| 2012 | ||
|---|---|---|
| j4 | Stuart N. Wooters, Adam C. Cabe, Zhenyu Qi, Jiajing Wang, Randy W. Mann, Benton H. Calhoun, Mircea R. Stan, Travis N. Blalock: Tracking On-Chip Age Using Distributed, Embedded Sensors. IEEE Trans. VLSI Syst. 20(11): 1974-1985 (2012) | |
| 2010 | ||
| j3 | Stuart N. Wooters, Benton H. Calhoun, Travis N. Blalock: An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS. IEEE Trans. on Circuits and Systems 57-II(4): 290-294 (2010) | |
| c8 | Zhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan: SRAM-based NBTI/PBTI sensor system design. DAC 2010: 849-852 | |
| 2009 | ||
| c7 | Benton H. Calhoun, Jonathan F. Bolus, Sudhanshu Khanna, Andrew D. Jurik, Alfred C. Weaver, Travis N. Blalock: Sub-threshold Operation and Cross-hierarchy Design for Ultra Low Power Wearable Sensors. ISCAS 2009: 1437-1440 | |
| c6 | Steven C. Jocke, Jonathan F. Bolus, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun: A 2.6 µW sub-threshold mixed-signal ECG SoC. ISLPED 2009: 117-118 | |
| c5 | Adam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan: Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ISQED 2009: 1-6 | |
| 2008 | ||
| j2 | Michael I. Fuller, Karthik Ranganathan, Shiwei Zhou, Travis N. Blalock, John A. Hossack, William F. Walker: Experimental System Prototype of a Portable, Low-Cost, C-Scan Ultrasound Imaging Device. IEEE Trans. Biomed. Engineering 55(2): 519-530 (2008) | |
| 2007 | ||
| c4 | Brandon L. Dell, Jonathan F. Bolus, Travis N. Blalock: An automated unique tagging system using CMOS process variation. ACM Great Lakes Symposium on VLSI 2007: 216-218 | |
| 2005 | ||
| c3 | Yan Zhang, Travis N. Blalock, Mircea R. Stan: A three-level toggle-avoid bus signaling scheme. ISCAS (2) 2005: 1843-1846 | |
| 2004 | ||
| j1 | Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock: An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks. IEEE Trans. Dependable Sec. Comput. 1(3): 179-189 (2004) | |
| 2003 | ||
| c2 | Michael I. Fuller, James P. Mabry, John A. Hossack, Travis N. Blalock: 40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications. ACM Great Lakes Symposium on VLSI 2003: 182-185 | |
| c1 | Ram Suryanarayan, Anubhav Gupta, Travis N. Blalock: A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit. ACM Great Lakes Symposium on VLSI 2003: 273-276 | |
Colors in the list of coauthors
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