Maik Boden

List of publications from the DBLP Bibliography Server - FAQ
Other views: by type - by year (modern) - classic-C

Ask others: ACM DL/Guide -

	2008
c7		Maik Boden, Thomas Fiebig, Markus Reiband, Peter Reichel, Steffen Rülke: GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs. ISVLSI 2008: 298-303
	2007
c6		Maik Boden, Thomas Fiebig, Torsten Meibner, Steffen Rülke, Jürgen Becker: High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs. IPDPS 2007: 1-8
	2006
c5		Maik Boden, Steffen Rülke, Jürgen Becker: A high-level target-precise model for designing reconfigurable HW tasks. IPDPS 2006
	2005
c4		Maik Boden, Alex Gleich, Steffen Rülke, Ulrich Nageldinger: A Low-Cost Realization of an Adaptable Protocol Processing Unit. IPDPS 2005
	2004
c3		Maik Boden, Manfred Koegst, José Luis Tiburcio Badía, Steffen Rülke: Cost-Efficient Implementation of Adaptive Finite State Machines. DSD 2004: 144-151
	2002
c2		Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke: Enhanced Reusability for SoC-Based HW/SW Co-Design. DSD 2002: 94-101
c1		Jörg Schneider, Maik Boden, Steffen Rülke: Eine wiederverwendungsgerechte Entwurfsmethodik für rekonfigurierbare SoC-Architekturen. MBMV 2002: 36-45

Coauthor Index

1	José Luis Tiburcio Badía	[c3]
2	Jürgen Becker	[c6] [c5]
3	Klaus Feske	[c2]
4	Thomas Fiebig	[c7] [c6]
5	Alex Gleich	[c4]
6	Manfred Koegst	[c3]
7	Torsten Meibner	[c6]
8	Ulrich Nageldinger	[c4]
9	Markus Reiband	[c7]
10	Peter Reichel	[c7]
11	Steffen Rülke	[c7] [c6] [c5] [c4] [c3] [c2] [c1]
12	Jörg Schneider (Joerg Schneider)	[c2] [c1]

Last update Tue May 21 00:14:05 2013 CET by the DBLP Team —

Data released under the ODC-BY 1.0 license — See also our legal information page