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Paolo Bonzini
2010 – today
- 2011
[j2]Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi: EGRA: A Coarse Grained Reconfigurable Architectural Template. IEEE Trans. VLSI Syst. 19(6): 1062-1074 (2011)
2000 – 2009
- 2009
- [c8]Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi: Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration. DATE 2009: 542-547
- 2008
- [j1]Paolo Bonzini, Laura Pozzi: Recurrence-Aware Instruction Set Selection for Extensible Embedded Processors. IEEE Trans. VLSI Syst. 16(10): 1259-1267 (2008)
- [c7]Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi: Compiling custom instructions onto expression-grained reconfigurable architectures. CASES 2008: 51-60
- [c6]Michele Lanza, Amy L. Murphy, Romain Robbes, Mircea Lungu, Paolo Bonzini: A teamwork-based approach to programming fundamentals with scheme, smalltalk & java. ICSE 2008: 787-790
- [c5]Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi: Design and Architectural Exploration of Expression-Grained Reconfigurable Arrays. SASP 2008: 26-33
- 2007
- [c4]Paolo Bonzini, Laura Pozzi: A Retargetable Framework for Automated Discovery of Custom Instructions. ASAP 2007: 334-341
- [c3]Paolo Bonzini, Laura Pozzi: Polynomial-time subgraph enumeration for automated instruction set extension. DATE 2007: 1331-1336
- [c2]Paolo Bonzini, Dilek Harmanci, Laura Pozzi: A Study of Energy Saving in Customizable Processors. SAMOS 2007: 304-312
- 2006
- [c1]Paolo Bonzini, Laura Pozzi: Code transformation strategies for extensible embedded processors. CASES 2006: 242-252
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last updated on 2012-12-02 21:45 CET by the dblp team