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 | 1994 | |
|---|---|---|
| c3 |      | Hamid Barghi, William T. Cronenwett, Jon G. Bredeson: Real-Time Study of a High Performance Protocol for Local/Metropolitan Ring Networks. LCN 1994: 139-145 |
| 1980 | ||
| j4 |  | John C. Sutton, Jon G. Bredeson: Minimal Redundant Logic for High Reliability and Irredundant Testability. IEEE Trans. Computers 29(7): 648-656 (1980) |
| 1978 | ||
| j3 | | Zosimo Arevalo, Jon G. Bredeson: A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays. IEEE Trans. Computers 27(11): 1028-1039 (1978) |
| 1975 | ||
| j2 | | Jon G. Bredeson: Comments on ``Synthesis of Multiple-Input Change Asynchronous Machines Using Controlled Excitation and Flip-Flops''. IEEE Trans. Computers 24(11): 1142-1143 (1975) |
| 1973 | ||
| c2 | | Jon G. Bredeson: On Multiple Input Change Hazard-Free Combinatorial Switching Circuits without Feedback. SWAT (FOCS) 1973: 56-63 |
| 1972 | ||
| j1 | | Jon G. Bredeson, Paul T. Hulina: Elimination of Static and Dynamic Hazards for Multiple Input Changes in Combinatorial Switching Circuits. Information and Control 20(2): 114-124 (1972) |
| 1970 | ||
| c1 | | Jon G. Bredeson, Paul T. Hulina: Elimination of Static and Dynamic Hazards in Combinatorial Switching Circuits. SWAT (FOCS) 1970: 104-108 |
| 1 | Zosimo Arevalo | |
| 2 | Hamid Barghi | |
| 3 | William T. Cronenwett | |
| 4 | Paul T. Hulina | |
| 5 | John C. Sutton |
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