Jay B. Brockman

Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi: The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing. TACO 10(1): 5 (2013)

Ke Chen, Sheng Li, Naveen Muralimanohar, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi: CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory. DATE 2012: 33-38

Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Yuan Xie, Norman P. Jouppi: MAGE: adaptive granularity and ECC for resilient and power efficient memory systems. SC 2012: 33

Sheng Li, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge: Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip. IEEE Trans. Parallel Distrib. Syst. 22(7): 1178-1191 (2011)

Sheng Li, Ke Chen, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi: CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques. ICCAD 2011: 694-701

Sheng Li, Ke Chen, Ming-yu Hsieh, Naveen Muralimanohar, Chad D. Kersey, Jay B. Brockman, Arun F. Rodrigues, Norman P. Jouppi: System implications of memory reliability in exascale computing. SC 2011: 46

Peter Bui, Jay B. Brockman: Performance analysis of accelerated image registration using GPGPU. GPGPU 2009: 38-45

Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi: McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. MICRO 2009: 469-480

Jay B. Brockman, Sheng Li, Peter M. Kogge, Amit Kashyap, Mohammad M. Mojarradi: Design of a mask-programmable memory/multiplier array using G4-FET technology. DAC 2008: 337-338

Sheng Li, Shannon K. Kuntz, Peter M. Kogge, Jay B. Brockman: Memory model effects on application performance for a lightweight multithreaded architecture. IPDPS 2008: 1-8

Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi: A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. ISCA 2008: 51-62

Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge, Paul L. Springer, Gary Block: A Heterogeneous Lightweight Multithreaded Architecture. IPDPS 2007: 1-8

James F. Kramer, Matthias Scheutz, Jay B. Brockman, Peter M. Kogge: Facing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures. PDPTA 2006: 227-233

Shyamkumar Thoziyoor, Jay B. Brockman, Daniel Rinzler: PIM lite: a multithreaded processor-in-memory prototype. ACM Great Lakes Symposium on VLSI 2005: 64-69

Ed Upchurch, Thomas L. Sterling, Jay B. Brockman: Analysis and Modeling of Advanced PIM Architecture Design Tradeoffs. SC 2004: 12

Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. Kuntz, Peter M. Kogge: A low cost, multithreaded processing-in-memory system. WMPI 2004: 16-22

Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Jay B. Brockman, Ron Brightwell, Keith D. Underwood: Implications of a PIM Architectural Model for MPI. CLUSTER 2003: 259-

Gary H. Bernstein, Jay B. Brockman, Peter M. Kogge, Gregory L. Snider, Barbara E. Walvoord: From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. MSE 2003: 95-97

Jucain E. Butler, Jay B. Brockman: A web-based learning tool that simulates a simple computer architecture. SIGCSE Bulletin 33(2): 47-50 (2001)

Lilia Yerosheva, Shannon K. Kuntz, Peter M. Kogge, Jay B. Brockman: A Microserver View of HTMT. IPDPS 2001: 3

Arun N. Lokanathan, Jay B. Brockman: A methodology for concurrent process-circuit optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 889-902 (1999)

Jay B. Brockman, Peter M. Kogge, Thomas L. Sterling, Vincent W. Freeh, Shannon K. Kuntz: Microservers: a new memory semantics for massively parallel computing. International Conference on Supercomputing 1999: 454-463

Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park: Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. SC 1999: 57

Eric W. Johnson, Jay B. Brockman: Measurement and analysis of sequential design processes. ACM Trans. Design Autom. Electr. Syst. 3(1): 1-20 (1998)

Arun N. Lokanathan, Jay B. Brockman: Process Multi-Circuit Optimization. DAC 1998: 382-387

Eric W. Johnson, Luis A. Castillo, Jay B. Brockman: Application of a Markov Model to the Measurement, Simulation, and Diagnosis of an Iterative Design Process. DAC 1996: 185-188

Arun N. Lokanathan, Jay B. Brockman, John E. Renaud: A Methodology for Concurrent Fabrication Process/Cell Library Optimization. DAC 1996: 825-830

Eric W. Johnson, Jay B. Brockman: Sensitivity analysis of iterative design processes. ICCAD 1996: 142-145

Jay B. Brockman, Stephen W. Director: The schema-based approach to workflow management. IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1257-1267 (1995)

Eric W. Johnson, Jay B. Brockman: Incorporating Design Schedule Management into a Flow Management System. DAC 1995: 82-87

Xinhui Niu, Jay B. Brockman: A Bayesian Approach to Variable Screening for Modeling the IC Fabrication Process. ISCAS 1995: 1227-1230

Peter R. Sutton, Jay B. Brockman, Stephen W. Director: Design Management Using Dynamically Defined Flows. DAC 1993: 648-653

Jay B. Brockman, Stephen W. Director: A Schema-Based Approach to CAD Task Management. Electronic Design Automation Frameworks 1992: 71-84

Jay B. Brockman, Stephen W. Director: The Hercules CAD Task Management System. ICCAD 1991: 254-257