DBLP: Andrew D. Brown

	2012
j12		Andrew D. Brown, D. J. D. Milton, Andrew J. Rushton, Peter R. Wilson: Behavioural synthesis utilising recursive definitions. IET Computers & Digital Techniques 6(6): 362-369 (2012)
	2010
c16		Andrew D. Brown, Steve Furber, Jeff S. Reeve, Peter R. Wilson, Mark Zwolinski, John E. Chad, Luis A. Plana, David R. Lester: A communication infrastructure for a million processor machine. Conf. Computing Frontiers 2010: 75-76
	2009
c15		Stephen B. Furber, Andrew D. Brown: Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors. ACSD 2009: 3-12
	2008
c14		Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew D. Brown: A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits. DATE 2008: 152-157
c13		Andrew D. Brown, David R. Lester, Luis A. Plana, Steve Furber, Peter R. Wilson: SpiNNaker: The Design Automation Problem. ICONIP (2) 2008: 1049-1056
	2006
c12		Stephen B. Furber, Steve Temple, Andrew D. Brown: On-chip and inter-chip networks for modeling large-scale neural systems. ISCAS 2006
c11		Sankalp S. Modi, Peter R. Wilson, Andrew D. Brown: Power aware learning for class AB analogue VLSI neural network. ISCAS 2006
	2004
j11		Mathew A. Sacker, Andrew D. Brown, Andrew J. Rushton, Peter R. Wilson: A behavioral synthesis system for asynchronous circuits. IEEE Trans. VLSI Syst. 12(9): 978-994 (2004)
c10		Mathew A. Sacker, Andrew D. Brown, Peter R. Wilson, Andrew J. Rushton: A General Purpose Behavioural Asynchronous Synthesis System. ASYNC 2004: 125-134
c9		Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski: Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS. DATE 2004: 742-743
c8		Matthew A. Swabey, Stephen P. Beeby, Andrew D. Brown, John E. Chad: Using Otoacoustic Emissions as a Biometric. ICBA 2004: 600-606
c7		Mark Zwolinski, Andrew D. Brown: Behavioural modelling of analogue faults in VHDL-AMS - a case study. ISCAS (5) 2004: 632-635
c6		Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Andrew J. Rushton: Multiple domain behavioral modeling using VHDL-AMS. ISCAS (5) 2004: 644-647
	2003
c5		Andrew D. Brown, Mark Zwolinski: The continuous-discrete interface - What does this really mean? Modelling and simulation issues. ISCAS (3) 2003: 894-897
	2002
j10		Enric T. Claverol, Andrew D. Brown, John E. Chad: Scalable cortical simulations on Beowulf architectures. Neurocomputing 43(1-4): 307-315 (2002)
j9		Enric T. Claverol, Andrew D. Brown, John E. Chad: Discrete simulation of large aggregates of neurons. Neurocomputing 47(1-4): 277-297 (2002)
j8		Enric T. Claverol, Andrew D. Brown, John E. Chad: A large-scale simulation of the piriform cortex by a cell automaton-based network model. IEEE Trans. Biomed. Engineering 49(9): 921-935 (2002)
c4		Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç: Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. DATE 2002: 1133
	2001
j7		Zaher Baidas, Andrew D. Brown, Alan Christopher Williams: Floating-point behavioral synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 20(7): 828-839 (2001)
c3		Andrew D. Brown, Geoffrey E. Hinton: Relative Density Nets: A New Way to Combine Backpropagation with HMM's. NIPS 2001: 1149-1156
	2000
j6		Andrew D. Brown, Howard C. Card: Cooperative Coevolution of Neural Representations. Int. J. Neural Syst. 10(4): 311-320 (2000)
j5		Nicola Nicolici, Bashir M. Al-Hashimi, Andrew D. Brown, Alan Christopher Williams: BIST hardware synthesis for RTL data paths based on testcompatibility classes. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1375-1385 (2000)
	1999
j4		Andrew D. Brown, Howard C. Card: Cooperative-Competitive Algorithms for Evolutionary Networks Classifying Noisy Digital Images. Neural Processing Letters 10(3): 223-229 (1999)
c2		Geoffrey E. Hinton, Andrew D. Brown: Spiking Boltzmann Machines. NIPS 1999: 122-128
	1997
j3		Andrew D. Brown, Keith R. Baker, Alan Christopher Williams: On-line testing of statically and dynamically scheduled synthesized systems. IEEE Trans. on CAD of Integrated Circuits and Systems 16(1): 47-57 (1997)
	1992
j2		Andrew D. Brown, Mark Zwolinski, Ken G. Nichols, Tom J. Kazmierski: Confidence in mixed-mode circuit simulation. Computer-Aided Design 24(2): 115-118 (1992)
	1991
c1		Tom J. Kazmierski, Andrew D. Brown, Ken G. Nichols, Mark Zwolinski: A General Purpose Network Solving System. VLSI 1991: 147-156
	1990
j1		Andrew D. Brown, Mark Zwolinski: Lee router modified for global routing. Computer-Aided Design 22(5): 296-300 (1990)

2012

j12

Andrew D. Brown, D. J. D. Milton, Andrew J. Rushton, Peter R. Wilson: Behavioural synthesis utilising recursive definitions. IET Computers & Digital Techniques 6(6): 362-369 (2012)

2010

c16

Andrew D. Brown, Steve Furber, Jeff S. Reeve, Peter R. Wilson, Mark Zwolinski, John E. Chad, Luis A. Plana, David R. Lester: A communication infrastructure for a million processor machine. Conf. Computing Frontiers 2010: 75-76

2009

c15

Stephen B. Furber, Andrew D. Brown: Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors. ACSD 2009: 3-12

2008

c14

Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew D. Brown: A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits. DATE 2008: 152-157

c13

Andrew D. Brown, David R. Lester, Luis A. Plana, Steve Furber, Peter R. Wilson: SpiNNaker: The Design Automation Problem. ICONIP (2) 2008: 1049-1056

2006

c12

Stephen B. Furber, Steve Temple, Andrew D. Brown: On-chip and inter-chip networks for modeling large-scale neural systems. ISCAS 2006

c11

Sankalp S. Modi, Peter R. Wilson, Andrew D. Brown: Power aware learning for class AB analogue VLSI neural network. ISCAS 2006

2004

j11

Mathew A. Sacker, Andrew D. Brown, Andrew J. Rushton, Peter R. Wilson: A behavioral synthesis system for asynchronous circuits. IEEE Trans. VLSI Syst. 12(9): 978-994 (2004)

c10

Mathew A. Sacker, Andrew D. Brown, Peter R. Wilson, Andrew J. Rushton: A General Purpose Behavioural Asynchronous Synthesis System. ASYNC 2004: 125-134

Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski: Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS. DATE 2004: 742-743

Matthew A. Swabey, Stephen P. Beeby, Andrew D. Brown, John E. Chad: Using Otoacoustic Emissions as a Biometric. ICBA 2004: 600-606

Mark Zwolinski, Andrew D. Brown: Behavioural modelling of analogue faults in VHDL-AMS - a case study. ISCAS (5) 2004: 632-635

Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Andrew J. Rushton: Multiple domain behavioral modeling using VHDL-AMS. ISCAS (5) 2004: 644-647

2003

Andrew D. Brown, Mark Zwolinski: The continuous-discrete interface - What does this really mean? Modelling and simulation issues. ISCAS (3) 2003: 894-897

2002

j10

Enric T. Claverol, Andrew D. Brown, John E. Chad: Scalable cortical simulations on Beowulf architectures. Neurocomputing 43(1-4): 307-315 (2002)

Enric T. Claverol, Andrew D. Brown, John E. Chad: Discrete simulation of large aggregates of neurons. Neurocomputing 47(1-4): 277-297 (2002)

Enric T. Claverol, Andrew D. Brown, John E. Chad: A large-scale simulation of the piriform cortex by a cell automaton-based network model. IEEE Trans. Biomed. Engineering 49(9): 921-935 (2002)

Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç: Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. DATE 2002: 1133

2001

Zaher Baidas, Andrew D. Brown, Alan Christopher Williams: Floating-point behavioral synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 20(7): 828-839 (2001)

Andrew D. Brown, Geoffrey E. Hinton: Relative Density Nets: A New Way to Combine Backpropagation with HMM's. NIPS 2001: 1149-1156

2000

Andrew D. Brown, Howard C. Card: Cooperative Coevolution of Neural Representations. Int. J. Neural Syst. 10(4): 311-320 (2000)

Nicola Nicolici, Bashir M. Al-Hashimi, Andrew D. Brown, Alan Christopher Williams: BIST hardware synthesis for RTL data paths based on testcompatibility classes. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1375-1385 (2000)

1999

Andrew D. Brown, Howard C. Card: Cooperative-Competitive Algorithms for Evolutionary Networks Classifying Noisy Digital Images. Neural Processing Letters 10(3): 223-229 (1999)

Geoffrey E. Hinton, Andrew D. Brown: Spiking Boltzmann Machines. NIPS 1999: 122-128

1997

Andrew D. Brown, Keith R. Baker, Alan Christopher Williams: On-line testing of statically and dynamically scheduled synthesized systems. IEEE Trans. on CAD of Integrated Circuits and Systems 16(1): 47-57 (1997)

1992

Andrew D. Brown, Mark Zwolinski, Ken G. Nichols, Tom J. Kazmierski: Confidence in mixed-mode circuit simulation. Computer-Aided Design 24(2): 115-118 (1992)

1991

Tom J. Kazmierski, Andrew D. Brown, Ken G. Nichols, Mark Zwolinski: A General Purpose Network Solving System. VLSI 1991: 147-156

1990

Andrew D. Brown, Mark Zwolinski: Lee router modified for global routing. Computer-Aided Design 22(5): 296-300 (1990)

1	Bashir M. Al-Hashimi	[j5]
2	Sawal Ali	[c14]
3	Zaher Baidas	[j7]
4	Keith R. Baker	[j3]
5	Jerzy Baranowski	[c9]
6	Stephen P. Beeby	[c8]
7	Howard C. Card	[j6] [j4]
8	John E. Chad	[c16] [c8] [j10] [j9] [j8]
9	Enric T. Claverol	[j10] [j9] [j8]
10	Stephen B. Furber (Steve Furber)	[c16] [c15] [c13] [c12]
11	Geoffrey E. Hinton	[c3] [c2]
12	Tom J. Kazmierski	[c9] [j2] [c1]
13	Yavuz Kiliç	[c4]
14	David R. Lester	[c16] [c13]
15	D. J. D. Milton	[j12]
16	Sankalp S. Modi	[c11]
17	Ken G. Nichols	[j2] [c1]
18	Nicola Nicolici	[j5]
19	Luis A. Plana	[c16] [c13]
20	Jeff S. Reeve	[c16]
21	J. Neil Ross	[c9] [c6] [c4]
22	Andrew J. Rushton	[j12] [j11] [c10] [c6]
23	Mathew A. Sacker	[j11] [c10]
24	Matthew A. Swabey	[c8]
25	Steve Temple	[c12]
26	Reuben Wilcock	[c14]
27	Alan Christopher Williams	[j7] [j5] [j3]
28	Peter R. Wilson	[j12] [c16] [c14] [c13] [c11] [j11] [c10] [c9] [c6] [c4]
29	Mark Zwolinski	[c16] [c7] [c5] [c4] [j2] [c1] [j1]

Andrew D. Brown

Coauthor Index