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Doug Burger
2010 – today
- 2013
[j32]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger: Power challenges may end the multicore era. Commun. ACM 56(2): 93-102 (2013)- [j31]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger: Neural Acceleration for General-Purpose Approximate Programs. IEEE Micro 33(3): 16-27 (2013)
- [c67]Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam, Doug Burger, Stephen W. Keckler: How to implement effective prediction and forwarding for fusable dynamic multicore architectures. HPCA 2013: 460-471
- [c66]Tiejun Gao, Karin Strauss, Stephen M. Blackburn, Kathryn S. McKinley, Doug Burger, James R. Larus: Using managed runtime systems to tolerate holes in wearable memories. PLDI 2013: 297-308
- 2012
- [j30]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger: Dark Silicon and the End of Multicore Scaling. IEEE Micro 32(3): 122-134 (2012)
- [j29]Doug Burger, Stephen W. Keckler, Mark Papermaster: Charles R. (Chuck) Moore (1961 - 2012). IEEE Micro 32(4): 3-5 (2012)
- [j28]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger: Power Limitations and Dark Silicon Challenge the Future of Multicore. ACM Trans. Comput. Syst. 30(3): 11 (2012)
- [c65]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger: Architecture support for disciplined approximate programming. ASPLOS 2012: 301-312
- [c64]Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger: Exploiting microarchitectural redundancy for defect tolerance. ICCD 2012: 35-42
- [c63]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger: Neural Acceleration for General-Purpose Approximate Programs. MICRO 2012: 449-460
- 2011
- [c62]Bertrand A. Maher, Katherine E. Coons, Kathryn S. McKinley, Doug Burger: The Good Block: Hardware/Software Design for Composable, Block-Atomic Processors. Interaction between Compilers and Computer Architectures 2011: 9-16
- [c61]Emmanouil Koukoumidis, Dimitrios Lymberopoulos, Karin Strauss, Jie Liu, Doug Burger: Pocket cloudlets. ASPLOS 2011: 171-184
- [c60]Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler: Exploiting criticality to reduce bottlenecks in distributed uniprocessors. HPCA 2011: 431-442
- [c59]Per Stenström, Doug Burger, Wen-mei W. Hwu, Vipin Kumar, Kunle Olukotun, David A. Padua, Burton Smith: Panel Statement. IPDPS 2011: 877
- [c58]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger: Dark silicon and the end of multicore scaling. ISCA 2011: 365-376
- [c57]Andrew Hay, Karin Strauss, Timothy Sherwood, Gabriel H. Loh, Doug Burger: Preventing PCM banks from seizing too much power. MICRO 2011: 186-195
- 2010
- [j27]Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger: Phase change memory architecture and the quest for scalability. Commun. ACM 53(7): 99-106 (2010)
- [j26]Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger: Phase-Change Technology and the Future of Main Memory. IEEE Micro 30(1): 143 (2010)
- [j25]James C. Hoe, Doug Burger, Joel S. Emer, Derek Chiou, Resit Sendag, Joshua J. Yi: The Future of Architectural Simulation. IEEE Micro 30(3): 8-18 (2010)
- [j24]Andrew Putnam, Aaron Smith, Doug Burger: Dynamic vectorization in the E2 dynamic multicore architecture. SIGARCH Computer Architecture News 38(4): 27-32 (2010)
- [c56]Samira Manabi Khan, Daniel A. Jiménez, Doug Burger, Babak Falsafi: Using dead blocks as a virtual victim cache. PACT 2010: 489-500
- [c55]Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili, Bertrand A. Maher, Doug Burger, Kathryn S. McKinley: Evolving Compiler Heuristics to Manage Communication and Contention. AAAI 2010
- [c54]Engin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger, Thomas Moscibroda: Dynamically replicated memory: building reliable systems from nanoscale resistive memories. ASPLOS 2010: 3-14
- [c53]Stuart E. Schechter, Gabriel H. Loh, Karin Strauss, Doug Burger: Use ECP, not ECC, for hard failures in resistive memories. ISCA 2010: 141-152
2000 – 2009
- 2009
- [j23]Renée St. Amant, Daniel A. Jiménez, Doug Burger: Mixed-Signal Approximate Computation: A Neural Predictor Case Study. IEEE Micro 29(1): 104-115 (2009)
- [c52]Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley: An evaluation of the TRIPS computer system. ASPLOS 2009: 1-12
- [c51]Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger: Architecting phase change memory as a scalable dram alternative. ISCA 2009: 2-13
- [c50]Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger: End-to-end validation of architectural power models. ISLPED 2009: 383-388
- [c49]Nitya Ranganathan, Doug Burger, Stephen W. Keckler: Analysis of the TRIPS prototype block predictor. ISPASS 2009: 195-206
- [c48]Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin C. Lee, Doug Burger, Derrick Coetzee: Better I/O through byte-addressable, persistent memory. SOSP 2009: 133-146
- 2008
- [j22]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible core chip multiprocessors. SIGARCH Computer Architecture News 36(2): 46-55 (2008)
- [c47]Katherine E. Coons, Behnam Robatmili, Matthew E. Taylor, Bertrand A. Maher, Doug Burger, Kathryn S. McKinley: Feature selection and policy optimization for distributed instruction placement using reinforcement learning. PACT 2008: 32-42
- [c46]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible-core chip multiprocessors. PACT 2008: 187-196
- [c45]Franziska Roesner, Doug Burger, Stephen W. Keckler: Counting Dependence Predictors. ISCA 2008: 215-226
- [c44]Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley: Register Bank Assignment for Spatially Partitioned Processors. LCPC 2008: 64-79
- [c43]Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley: Strategies for mapping dataflow blocks to distributed hardware. MICRO 2008: 23-34
- [c42]Haiming Liu, Michael Ferdman, Jaehyuk Huh, Doug Burger: Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency. MICRO 2008: 222-233
- [c41]Renée St. Amant, Daniel A. Jiménez, Doug Burger: Low-power, high-performance analog neural branch prediction. MICRO 2008: 447-458
- [c40]Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger: High performance dense linear algebra on a spatially distributed processor. PPOPP 2008: 63-72
- 2007
- [j21]Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007)
- [j20]Nicholas Nethercote, Doug Burger, Kathryn S. McKinley: Convergent Compilation Applied to Loop Unrolling. T. HiPEAC 1: 140-158 (2007)
- [j19]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distrib. Syst. 18(8): 1028-1040 (2007)
- [c39]Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler: Late-binding: enabling unordered load-store queues. ISCA 2007: 347-357
- [c38]Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler: Composable Lightweight Processors. MICRO 2007: 381-394
- [c37]Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS 2007: 7-17
- 2006
- [c36]Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha: A spatial path scheduling algorithm for EDGE architectures. ASPLOS 2006: 129-140
- [c35]Aaron Smith, Jon Gibson, Bertrand A. Maher, Nicholas Nethercote, Bill Yoder, Doug Burger, Kathryn S. McKinley, James H. Burrill: Compiling for EDGE Architectures. CGO 2006: 185-195
- [c34]Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of On-Chip Network Architectures. ICCD 2006
- [c33]Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler: Design and Implementation of the TRIPS Primary Memory System. ICCD 2006
- [c32]Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler: Critical path analysis of the TRIPS architecture. ISPASS 2006: 37-47
- [c31]Bertrand A. Maher, Aaron Smith, Doug Burger, Kathryn S. McKinley: Merging Head and Tail Duplication for Convergent Hyperblock Formation. MICRO 2006: 65-76
- [c30]Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley: Dataflow Predication. MICRO 2006: 89-102
- [c29]Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491
- 2005
- [c28]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA substrate for flexible CMP cache sharing. ICS 2005: 31-40
- 2004
- [j18]Doug Burger, James R. Goodman: Billion-Transistor Architectures: There and Back Again. IEEE Computer 37(3): 22-28 (2004)
- [j17]Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode: Scaling to the End of Silicon with EDGE Architectures. IEEE Computer 37(7): 44-55 (2004)
- [j16]Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi: Speculative Incoherent Cache Protocols. IEEE Micro 24(6): 104-109 (2004)
- [j15]Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High-ILP Processors. IEEE Micro 24(6): 118-127 (2004)
- [j14]Doug Burger, Anand Sivasubramaniam: Tools for computer architecture research. SIGMETRICS Performance Evaluation Review 31(4): 2-3 (2004)
- [j13]Doug Burger, Todd M. Austin, Stephen W. Keckler: Recent extensions to the SimpleScalar tool suite. SIGMETRICS Performance Evaluation Review 31(4): 4-7 (2004)
- [j12]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore: TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. TACO 1(1): 62-93 (2004)
- [c27]Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler: Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. IEEE PACT 2004: 74-84
- [c26]Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar S. Sohi: Coherence decoupling: making use of incoherence. ASPLOS 2004: 97-106
- [c25]Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler: Scalable selective re-execution for EDGE architectures. ASPLOS 2004: 120-132
- 2003
- [j11]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003)
- [j10]Changkyu Kim, Doug Burger, Stephen W. Keckler: Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro 23(6): 99-107 (2003)
- [j9]Deependra Talla, Lizy Kurian John, Doug Burger: Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements. IEEE Trans. Computers 52(8): 1015-1031 (2003)
- [j8]Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static energy reduction techniques for microprocessor caches. IEEE Trans. VLSI Syst. 11(3): 303-313 (2003)
- [c24]Doug Burger: Designing Ultra-large Instruction Issue Windows. Asia-Pacific Computer Systems Architecture Conference 2003: 14-20
- [c23]Doug Burger: Architectural versus physical solutions for on-chip communication challenges. CODES+ISSS 2003: 74
- [c22]Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger: Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD 2003: 170-
- [c21]Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger: Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD 2003: 481-488
- [c20]Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Kathryn S. McKinley, Charles C. Weems: Guided Region Prefetching: A Cooperative Hardware/Software Approach. ISCA 2003: 388-398
- [c19]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433
- [c18]Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger: Microprocessor pipeline energy analysis. ISLPED 2003: 282-287
- [c17]Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger: Universal Mechanisms for Data-Parallel Architectures. MICRO 2003: 303-314
- [c16]Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High ILP Processors. MICRO 2003: 399-410
- 2002
- [j7]Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, José-Lorenzo Cruz, Fernando Latorre, Antonio González, Mateo Valero: Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Computer Architecture News 30(1): 2-4 (2002)
- [c15]Changkyu Kim, Doug Burger, Stephen W. Keckler: An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS 2002: 211-222
- [c14]Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi: Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN 2002: 389-398
- [c13]M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas: The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA 2002: 14-24
- 2001
- [j6]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger: Designing a Modern Memory Hierarchy with Hardware Prefetching. IEEE Trans. Computers 50(11): 1202-1218 (2001)
- [c12]Jaehyuk Huh, Doug Burger, Stephen W. Keckler: Exploring the Design Space of Future CMPs. IEEE PACT 2001: 199-210
- [c11]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger: Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. HPCA 2001: 301-312
- [c10]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger, Thomas R. Puzak: Filtering Superfluous Prefetches Using Density Vectors. ICCD 2001: 124-132
- [c9]Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static Energy Reduction Techniques for Microprocessor Caches. ICCD 2001: 276-283
- [c8]Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler: A design space evaluation of grid processor architectures. MICRO 2001: 40-51
- 2000
- [c7]Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger: Clock rate versus IPC: the end of the road for conventional microarchitectures. ISCA 2000: 248-259
1990 – 1999
- 1999
- [j5]Stefanos Kaxiras, Doug Burger, James R. Goodman: DataScalar: A memory-centric approach to computing. Journal of Systems Architecture 45(12-13): 1001-1022 (1999)
- 1997
- [j4]Doug Burger, James R. Goodman: Billion-Transistor Architectures - Guest Editors' Introduction. IEEE Computer 30(9): 46-49 (1997)
- [j3]Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew: Changing Interaction of Compiler and Architecture. IEEE Computer 30(12): 51-58 (1997)
- [c6]Alain Kägi, Doug Burger, James R. Goodman: Efficient Synchronization: Let Them Eat QOLB. ISCA 1997: 170-180
- [c5]
- [p1]Doug Burger, James R. Goodman, Gurindar S. Sohi: Memory Systems. The Computer Science and Engineering Handbook 1997: 447-461
- 1996
- [j2]
- [j1]Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood: Paging tradeoffs in distributed-shared-memory multiprocessors. The Journal of Supercomputing 10(1): 87-104 (1996)
- [c4]Doug Burger, James R. Goodman, Alain Kägi: Memory Bandwidth Limitations of Future Microprocessors. ISCA 1996: 78-89
- 1995
- [c3]Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman: Techniques for Reducing Overheads of Shared-Memory Multiprocessing. International Conference on Supercomputing 1995: 11-20
- [c2]Doug Burger, David A. Wood: Accuracy vs. performance in parallel simulation of interconnection networks. IPPS 1995: 22-31
- 1994
- [c1]Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood: Paging tradeoffs in distributed-shared-memory multiprocessors. SC 1994: 590-599
Coauthor Index
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last updated on 2013-06-12 21:34 CEST by the dblp team