Wayne P. Burleson

Jia Zhao, Shiting (Justin) Lu, Wayne Burleson, Russell Tessier: Run-time probabilistic detection of miscalibrated thermal sensors in many-core systems. DATE 2013: 1395-1398

Vinay C. Patil, Sudarshan Srinivasan, Wayne P. Burleson, Sandip Kundu: Impact of Clock-Gating on Power Distribution Network Using Wavelet Analysis. VLSI Design 2013: 80-85

Ulrich Rührmair, Jan Sölter, Frank Sehnke, Xiaolin Xu, Ahmed Mahmoud, Vera Stoyanova, Gideon Dror, Jürgen Schmidhuber, Wayne Burleson, Srinivas Devadas: PUF Modeling Attacks on Simulated and Silicon Data. IACR Cryptology ePrint Archive 2013: 112 (2013)

Markus Kasper, Amir Moradi, Georg T. Becker, Oliver Mischke, Tim Güneysu, Christof Paar, Wayne Burleson: Side channels as building blocks. J. Cryptographic Engineering 2(3): 143-159 (2012)

Ali Galip Bayrak, Nikola Velickovic, Paolo Ienne, Wayne Burleson: An architecture-independent instruction shuffler to protect against side-channel attacks. TACO 8(4): 20 (2012)

Georg T. Becker, Daehyun Strobel, Christof Paar, Wayne Burleson: Detecting Software Theft in Embedded Systems: A Side-Channel Approach. IEEE Transactions on Information Forensics and Security 7(4): 1144-1154 (2012)

Lang Lin, Sudheendra Srivathsa, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne Burleson: Design and Validation of Arbiter-Based PUFs for Sub-45-nm Low-Power Security Applications. IEEE Transactions on Information Forensics and Security 7(4): 1394-1403 (2012)

Jinwook Jang, Olivier Franza, Wayne Burleson: Compact Expressions for Supply Noise Induced Period Jitter of Global Binary Clock Trees. IEEE Trans. VLSI Syst. 20(1): 66-79 (2012)

Wayne Burleson, Shane S. Clark, Benjamin Ransford, Kevin Fu: Design challenges for secure implantable medical devices. DAC 2012: 12-17

Jia Zhao, Russell Tessier, Wayne Burleson: Distributed sensor data processing for many-cores. ACM Great Lakes Symposium on VLSI 2012: 159-164

Shiting (Justin) Lu, Russell Tessier, Wayne Burleson: Collaborative calibration of on-chip thermal sensors using performance counters. ICCAD 2012: 15-22

Vikram B. Suresh, Wayne P. Burleson: Robust metastability-based TRNG design in nanometer CMOS with sub-vdd pre-charge and hybrid self-calibration. ISQED 2012: 298-305

Hu Xu, Vasilis F. Pavlidis, Wayne Burleson, Giovanni De Micheli: The combined effect of process variations and power supply noise on clock skew and jitter. ISQED 2012: 320-327

Gesine Hinterwälder, Christof Paar, Wayne P. Burleson: Privacy Preserving Payments on Computational RFID Devices with Application in Intelligent Transportation Systems. RFIDSec 2012: 109-122

Daniel E. Holcomb, Amir Rahmati, Mastooreh Salajegheh, Wayne P. Burleson, Kevin Fu: DRV-Fingerprinting: Using Data Retention Voltage of SRAM Cells for Chip Identification. RFIDSec 2012: 165-179

Basab Datta, Wayne Burleson: Temperature Effects on Practical Energy Optimization of Sub-Threshold Circuits in Deep Nanometer Technologies. J. Low Power Electronics 7(3): 403-419 (2011)

Jia Zhao, Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burleson, Russell Tessier: A Dedicated Monitoring Infrastructure for Multicore Processors. IEEE Trans. VLSI Syst. 19(6): 1011-1022 (2011)

Jinwook Jang, Wayne Burleson: An arbiter based on-chip droop detector system. ACM Great Lakes Symposium on VLSI 2011: 1-6

Basab Datta, Wayne Burleson: A 45.6μ² 13.4μw 7.1v/v resolution sub-threshold based digital process-sensing circuit in 45nm CMOS. ACM Great Lakes Symposium on VLSI 2011: 133-138

Basab Datta, Wayne Burleson: A high sensitivity and process tolerant digital thermal sensing scheme for 3-D Ics. ACM Great Lakes Symposium on VLSI 2011: 289-294

Krishna C. Chillara, Jinwook Jang, Wayne P. Burleson: Robust signaling techniques for through silicon via bundles. ACM Great Lakes Symposium on VLSI 2011: 383-386

Wayne Burleson, Yusuf Leblebici: Hardware security in VLSI. ACM Great Lakes Symposium on VLSI 2011: 447-448

Georg T. Becker, Ashwin Lakshminarasimhan, Lang Lin, Sudheendra Srivathsa, Vikram B. Suresh, Wayne Burleson: Implementing hardware Trojans: Experiences from a hardware Trojan challenge. ICCD 2011: 301-304

Basab Datta, Wayne Burleson: A 12.4μm² 133.4μW 4.56mV/°C resolution digital on-chip thermal sensing circuit in 45nm CMOS utilizing sub-threshold operation. ISQED 2011: 67-73

Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson, Russell Tessier: Multicore soft error rate stabilization using adaptive dual modular redundancy. DATE 2010: 27-32

Jia Zhao, Basab Datta, Wayne P. Burleson, Russell Tessier: Thermal-aware voltage droop compensation for multi-core architectures. ACM Great Lakes Symposium on VLSI 2010: 335-340

Basab Datta, Wayne Burleson: Analysis and mitigation of NBTI-impact on PVT variability in repeated global interconnect performance. ACM Great Lakes Symposium on VLSI 2010: 341-346

Basab Datta, Wayne P. Burleson: Circuit-level NBTI macro-models for collaborative reliability monitoring. ACM Great Lakes Symposium on VLSI 2010: 453-458

Vikram B. Suresh, Wayne P. Burleson: Entropy Extraction in Metastability-based TRNG. HOST 2010: 135-140

Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne Burleson: Low-power sub-threshold design of secure physical unclonable functions. ISLPED 2010: 43-48

Basab Datta, Wayne P. Burleson: Calibration of on-chip thermal sensors using process monitoring circuits. ISQED 2010: 461-467

Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Eduardo Wanderley Netto, Russell Tessier, Wayne P. Burleson: A security approach for off-chip memory in embedded microprocessor systems. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 37-45 (2009)

Daniel E. Holcomb, Wayne P. Burleson, Kevin Fu: Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers. IEEE Trans. Computers 58(9): 1198-1210 (2009)

Lang Lin, Markus Kasper, Tim Güneysu, Christof Paar, Wayne Burleson: Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. CHES 2009: 382-395

Lang Lin, Wayne P. Burleson: Analysis and mitigation of process variation impacts on Power-Attack Tolerance. DAC 2009: 238-243

Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burleson, Russell Tessier: A monitor interconnect and support subsystem for multicore processors. DATE 2009: 761-766

Basab Datta, Wayne P. Burleson: Low-power, process-variation tolerant on-chip thermal monitoring using track and hold based thermal sensors. ACM Great Lakes Symposium on VLSI 2009: 145-148

Lang Lin, Wayne Burleson, Christof Paar: MOLES: Malicious off-chip leakage enabled by side-channels. ICCAD 2009: 117-122

Basab Datta, Wayne Burleson: On temperature planarization effect of copper dummy fills in deep nanometer technology. ISQED 2009: 494-499

Basab Datta, Wayne Burleson: Temperature effects on energy optimization in sub-threshold circuit design. ISQED 2009: 680-685

Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin: Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective. IEEE Trans. VLSI Syst. 16(2): 144-155 (2008)

Basab Datta, Wayne Burleson: Collaborative sensing of on-chip wire temperatures using interconnect based ring oscillators. ACM Great Lakes Symposium on VLSI 2008: 41-46

Venkatesh Arunachalam, Wayne Burleson: Low-power clock distribution in a multilayer core 3d microprocessor. ACM Great Lakes Symposium on VLSI 2008: 429-434

Lang Lin, Wayne Burleson: Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems. ISCAS 2008: 252-255

Basab Datta, Wayne P. Burleson: Temperature measurement in Content Addressable Memory cells using bias-controlled VCO. SoCC 2008: 147-150

Atul Maheshwari, Wayne Burleson: Current-Sensing and Repeater Hybrid Circuit Technique for On-Chip Interconnects. IEEE Trans. VLSI Syst. 15(11): 1239-1244 (2007)

Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Wayne Burleson: High-efficiency protection solution for off-chip memory in embedded systems. ERSA 2007: 117-123

Sheng Xu, Ibis Benito, Wayne P. Burleson: Thermal Impacts on NoC Interconnects. NOCS 2007: 220

Romain Vaslin, Guy Gogniat, Eduardo Wanderley Netto, Russell Tessier, Wayne P. Burleson: Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory. ReCoSoC 2007: 146-153

Basab Datta, Wayne P. Burleson: Low power on-chip thermal sensors based on wires. VLSI-SoC 2007: 258-263

Lilian Bossuet, Guy Gogniat, Wayne Burleson: Dynamically configurable security for SRAM FPGA bitstreams. IJES 2(1/2): 73-85 (2006)

Guy Gogniat, Tilman Wolf, Wayne Burleson: Reconfigurable Security Support for Embedded Systems. HICSS 2006

Vishak Venkatraman, Mark Anders, Himanshu Kaul, Wayne Burleson, Ram Krishnamurthy: A Low-swing Signaling Circuit Technique for 65nm On-chip Interconnects. SoCC 2006: 289-292

Matthew W. Heath, Wayne P. Burleson, Ian G. Harris: Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test. IEEE Trans. Computers 54(12): 1532-1546 (2005)

Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne P. Burleson: A reconfigurable, power-efficient adaptive Viterbi decoder. IEEE Trans. VLSI Syst. 13(4): 484-488 (2005)

Russell Tessier, David Jasinski, Atul Maheshwari, Aiyappan Natarajan, Weifeng Xu, Wayne P. Burleson: An energy-aware active smart card. IEEE Trans. VLSI Syst. 13(10): 1190-1199 (2005)

Jeongseon Euh, Jeevan Chittamuru, Wayne Burleson: Power-Aware 3D Computer Graphics Rendering. VLSI Signal Processing 39(1-2): 15-33 (2005)

Vishak Venkatraman, Wayne Burleson: Robust Multi-Level Current-Mode On-Chip Interconnect Signaling in the Presence of Process Variations. ISQED 2005: 522-527

Aiyappan Natarajan, Vijay Shankar, Atul Maheshwari, Wayne Burleson: Sensing Design Issues in Deep Submicron CMOS SRAMs. ISVLSI 2005: 42-45

Jinwook Jang, Sheng Xu, Wayne Burleson: Jitter in Deep Sub-Micron Interconnect. ISVLSI 2005: 84-89

Wayne Burleson, Sheng Xu: Digital Systems Design with ASIC and FPGA: A Novel Course Using CD/DVD and On-Line Formats. MSE 2005: 3-4

Guy Gogniat, Wayne Burleson, Lilian Bossuet: Configurable Computing for High-Security/High-Performance Ambient Systems. SAMOS 2005: 72-81

Vishak Venkatraman, Wayne Burleson: Impact of Process Variations on Multi-Level Signaling for On-Chip Interconnects. VLSI Design 2005: 362-367

Atul Maheshwari, Wayne Burleson, Russell Tessier: Trading off transient fault tolerance and power consumption in deep submicron (DSM) VLSI circuits. IEEE Trans. VLSI Syst. 12(3): 299-311 (2004)

Atul Maheshwari, Wayne P. Burleson: Differential current-sensing for on-chip interconnects. IEEE Trans. VLSI Syst. 12(12): 1321-1329 (2004)

Prashant Jain, Andrew Laffely, Wayne Burleson, Russell Tessier, Dennis Goeckel: Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations. VLSI Signal Processing 36(1): 27-40 (2004)

Matthew W. Heath, Wayne P. Burleson, Ian G. Harris: Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s. DATE 2004: 410-415

Vishak Venkatraman, Atul Maheshwari, Wayne Burleson: Mitigating static power in current-sensed interconnects. ACM Great Lakes Symposium on VLSI 2004: 224-229

Lilian Bossuet, Guy Gogniat, Wayne Burleson: Dynamically Configurable Security for SRAM FPGA Bitstreams. IPDPS 2004

Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson: NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP 2004: 69-75

Atul Maheshwari, Israel Koren, Wayne Burleson: Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits. DFT 2003: 597-

Aiyappan Natarajan, David Jasinski, Wayne Burleson, Russell Tessier: A hybrid adiabatic content addressable memory for ultra low-power applications. ACM Great Lakes Symposium on VLSI 2003: 72-75

Atul Maheshwari, Wayne Burleson: Repeater and current-sensing hybrid circuits for on-chip interconnects. ACM Great Lakes Symposium on VLSI 2003: 269-272

Andrew Laffely, Jian Liang, Russell Tessier, Wayne Burleson: Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores. ICIP (3) 2003: 105-108

Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe: Targeting Tiled Architectures in Design Exploration. IPDPS 2003: 172

Srividya Srinivasaraghavan, Wayne Burleson: Interconnect Effort - A Unification of Repeater Insertion and Logical Effort. ISVLSI 2003: 55-61

Andrew Laffely, Wayne Burleson: Using System On-A-Chip As A Vehicle For VLSI Design Education. MSE 2003: 148-149

Ankireddy Nalamalpu, Sriram Srinivasan, Wayne P. Burleson: Boosters for driving long onchip interconnects - design issues, interconnect synthesis, and comparison with repeaters. IEEE Trans. on CAD of Integrated Circuits and Systems 21(1): 50-62 (2002)

Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne Burleson: A dynamically reconfigurable adaptive viterbi decoder. FPGA 2002: 227-236

Atul Maheshwari, Wayne Burleson, Russell Tessier: Trading off Reliability and Power-Consumption in Ultra-low Power Systems. ISQED 2002: 361-366

Jeongseon Euh, Jeevan Chittamuru, Wayne Burleson: A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics. PACS 2002: 99-109

Wayne Burleson, Naresh R. Shanbhag: Guest Editorial: Reconfigurable Signal Processing Systems. VLSI Signal Processing 28(1-2): 5-6 (2001)

Russell Tessier, Wayne Burleson: Reconfigurable Computing for Digital Signal Processing: A Survey. VLSI Signal Processing 28(1-2): 7-27 (2001)

Wayne Burleson, Prashant Jain, Subramanian Venkatraman: Dynamically Parameterized Architectures for Power-Aware Video Coding: Motion Estimation and DCT. Workshop on Digital and Computational Video 2001: 4-12

Ankireddy Nalamalpu, Wayne Burleson: Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters. ISPD 2001: 204-211

Elias S. Manolakos, Wayne Burleson: Guest Editor's Introduction. VLSI Signal Processing 24(1): 5-6 (2000)

Andrés D. García, Jean-Luc Danger, Wayne P. Burleson: Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. FPGA 2000: 220

J. Peden, Wayne Burleson, C. Leonardo: The Multimedia Online Collaboration Architecture: Tools to Enable Distance Learning. IEEE International Conference on Multimedia and Expo (II) 2000: 593-596

Jeongseon Euh, Wayne Burleson: Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering. PACS 2000: 51-64

Wayne P. Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems: The spring scheduling coprocessor: a scheduling accelerator. IEEE Trans. VLSI Syst. 7(1): 38-47 (1999)

S. R. Park, Wayne Burleson: Configuration Cloning: Exploiting Regularity in Dynamic DSP Architectures. FPGA 1999: 81-89

Andrés D. García, Wayne P. Burleson, Jean-Luc Danger: Power Modelling in Field Programmable Gate Arrays (FPGA). FPL 1999: 396-404

Wayne P. Burleson, Maciej J. Ciesielski, Fabian Klass, W. Liu: Wave-pipelining: a tutorial and research survey. IEEE Trans. VLSI Syst. 6(3): 464-474 (1998)

Bongjin Jung, Wayne P. Burleson: Efficient VLSI for Lempel-Ziv compression in wireless data communication networks. IEEE Trans. VLSI Syst. 6(3): 475-483 (1998)

Wayne P. Burleson, Konstantinos Konstantinides: Guest Editors' Introduction. VLSI Signal Processing 18(2): 87-88 (1998)

Bongjin Jung, Wayne P. Burleson: Vlsi Array Architectures for Pyramid Vector Quantization. VLSI Signal Processing 18(2): 141-154 (1998)

Bongjin Jung, Wayne P. Burleson: Performance optimization of wireless local area networks through VLSI data compression. Wireless Networks 4(1): 27-39 (1998)

Yongjin Jeong, Wayne P. Burleson: VLSI array algorithms and architectures for RSA modular multiplication. IEEE Trans. VLSI Syst. 5(2): 211-217 (1997)

Mircea R. Stan, Wayne P. Burleson: Low-power encodings for global communication in CMOS VLSI. IEEE Trans. VLSI Syst. 5(4): 444-455 (1997)

Mircea R. Stan, Wayne P. Burleson: Two dimensional codes for low power. ISLPED 1996: 335-340

Mircea R. Stan, Wayne P. Burleson: Bus-invert coding for low-power I/O. IEEE Trans. VLSI Syst. 3(1): 49-58 (1995)

Zheng Zhou, Wayne Burleson: Equivalence Checking of Datapaths Based on Canonical Arithmetic Expressions. DAC 1995: 546-551

Mircea R. Stan, Wayne P. Burleson: Coding a terminated bus for low power. Great Lakes Symposium on VLSI 1995: 70-73

Yongjin Jeong, Wayne Burleson: High-Level Estimation of High-Performance Architectures for Reed-Solomon Decoding. ISCAS 1995: 720-723

Mircea R. Stan, Wayne P. Burleson, Christopher I. Connolly, Roderic A. Grupen: Analog VLSI for robot path planning. VLSI Signal Processing 8(1): 61-73 (1994)

Wayne Burleson: Using Regular Array Methods for DSP Module Synthesis. HICSS (1) 1994: 58-67

Bongjin Jung, Wayne Burleson: A VLSI Systolic Array Architecture for Lempel-Ziv-Based Data Compression. ISCAS 1994: 65-68

Wayne Burleson, L. W. Cotten, Fabian Klass, Maciej J. Ciesielski: Forum: Wave-pipelining: Is it Practical? ISCAS 1994: 163-166

Wayne Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems: The Spring Scheduling Co-Processor: A Scheduling Accelerator. ICCD 1993: 140-144

J. David Narkiewicz, Wayne Burleson: Rank-order Filtering Algorithms: A Comparison of VLSI Implementations. ISCAS 1993: 1941-1944

Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems, Wayne Burleson, Jason Ko: The Spring Scheduling Co-Processor: Design, Use, and Performance. RTSS 1993: 106-111

Wayne P. Burleson, Louis L. Scharf: A VLSI design methodology for distributed arithmetic. VLSI Signal Processing 2(4): 235-252 (1991)

Walter B. Marvin, Wayne Burleson: A Simulator for General Purpose Optical Arrays. ICCD 1991: 486-489

Wayne P. Burleson, Louis L. Scharf: Input/Output Design for VLSI Array Architectures. VLSI 1991: 357-366