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Joseph R. Cavallaro
2010 – today
- 2012
[j35]Yang Sun, Joseph R. Cavallaro: Trellis-Search Based Soft-Input Soft-Output MIMO Detector: Algorithm and VLSI Architecture. IEEE Transactions on Signal Processing 60(5): 2617-2627 (2012)- [j34]Predrag Radosavljevic, Kyeong Jin Kim, Hao Shen, Joseph R. Cavallaro: Parallel Searching-Based Sphere Detector for MIMO Downlink OFDM Systems. IEEE Transactions on Signal Processing 60(6): 3240-3252 (2012)
- [j33]Yang Sun, Joseph R. Cavallaro: High-Throughput Soft-Output MIMO Detector Based on Path-Preserving Trellis-Search Algorithm. IEEE Trans. VLSI Syst. 20(7): 1235-1247 (2012)
- [c52]Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya, Joseph R. Cavallaro: GPU-based acceleration of symbol timing recovery. DASIP 2012: 1-8
- [c51]Aida Vosoughi, Michael Wu, Joseph R. Cavallaro: Baseband signal compression in wireless base stations. GLOBECOM 2012: 4505-4511
- [c50]Bei Yin, Kiarash Amiri, Joseph R. Cavallaro, Yuanbin Guo: Reconfigurable multi-standard uplink MIMO receiver with partial interference cancellation. ICC 2012: 4766-4770
- [c49]
- [e2]Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang (Eds.): Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. ACM 2012, ISBN 978-1-4503-1244-8
- 2011
- [j32]Yang Sun, Joseph R. Cavallaro: Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder. Integration 44(4): 305-315 (2011)
- [j31]Kiarash Amiri, Michael Wu, Joseph R. Cavallaro, Jorma Lilleberg: Cooperative Partial Detection Using MIMO Relays. IEEE Transactions on Signal Processing 59(10): 5039-5049 (2011)
- [j30]Markus Myllylä, Joseph R. Cavallaro, Markku J. Juntti: Architecture Design and Implementation of the Metric First List Sphere Detector Algorithm. IEEE Trans. VLSI Syst. 19(5): 895-899 (2011)
- [j29]Kiarash Amiri, Joseph R. Cavallaro, Chris Dick, Raghu Mysore Rao: A High Throughput Configurable SDR Detector for Multi-user MIMO Wireless Systems. Signal Processing Systems 62(2): 233-245 (2011)
- [j28]Yang Sun, Joseph R. Cavallaro: A Flexible LDPC/Turbo Decoder Architecture. Signal Processing Systems 64(1): 1-16 (2011)
- [j27]Michael Wu, Yang Sun, Siddharth Gupta, Joseph R. Cavallaro: Implementation of a High Throughput Soft MIMO Detector on GPU. Signal Processing Systems 64(1): 123-136 (2011)
- [j26]Michael Wu, Yang Sun, Guohui Wang, Joseph R. Cavallaro: Implementation of a High Throughput 3GPP Turbo Decoder on GPU. Signal Processing Systems 65(2): 171-183 (2011)
- [c48]Guohui Wang, Yang Sun, Joseph R. Cavallaro, Yuanbin Guo: High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder. ASAP 2011: 113-121
- [c47]Yang Sun, Guohui Wang, Joseph R. Cavallaro: Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes. ISCAS 2011: 1776-1779
- [c46]Guohui Wang, Michael Wu, Yang Sun, Joseph R. Cavallaro: A massively parallel implementation of QC-LDPC decoder on GPU. SASP 2011: 82-85
- [e1]Joseph R. Cavallaro, Milos D. Ercegovac, Frank Hannig, Paolo Ienne, Earl E. Swartzlander Jr., Alexandre F. Tenca (Eds.): 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011. IEEE 2011, ISBN 978-1-4577-1291-3
- 2010
- [j25]Markus Myllylä, Markku J. Juntti, Joseph R. Cavallaro: Implementation aspects of list sphere decoder algorithms for MIMO-OFDM systems. Signal Processing 90(10): 2863-2876 (2010)
- [j24]Johanna Ketonen, Markku J. Juntti, Joseph R. Cavallaro: Performance: complexity comparison of receivers for a LTE MIMO-OFDM system. IEEE Transactions on Signal Processing 58(6): 3360-3372 (2010)
- [c45]Kees A. Vissers, Devada Varma, Vinod Kathail, Jeff Bier, Don MacMillen, Joseph R. Cavallaro: Programming high performance signal processing systems in high level languages. FPGA 2010: 145
- [c44]Yang Sun, Joseph R. Cavallaro: Low-complexity and high-performance soft MIMO detection based on distributed M-algorithm through trellis-diagram. ICASSP 2010: 3398-3401
- [c43]Kiarash Amiri, Michael Wu, Melissa Duarte, Joseph R. Cavallaro: Physical layer algorithm and hardware verification of MIMO relays using cooperative partial detection. ICASSP 2010: 5614-5617
2000 – 2009
- 2009
- [j23]Predrag Radosavljevic, Yuanbin Guo, Joseph R. Cavallaro: Probabilistically bounded soft sphere detection for MIMO-OFDM receivers: algorithm and system architecture. IEEE Journal on Selected Areas in Communications 27(8): 1318-1330 (2009)
- [c42]Kiarash Amiri, Joseph R. Cavallaro: Partial detection for multiple antenna cooperation. CISS 2009: 669-674
- [c41]Yang Sun, Joseph R. Cavallaro: High throughput VLSI architecture for soft-output mimo detection based on a greedy graph algorithm. ACM Great Lakes Symposium on VLSI 2009: 445-450
- [c40]Markus Myllylä, Markku J. Juntti, Joseph R. Cavallaro: Architecture design and implementation of the increasing radius - List sphere detector algorithm. ICASSP 2009: 553-556
- [c39]Michael Wu, Siddharth Gupta, Yang Sun, Joseph R. Cavallaro: A GPU implementation of a real-time MIMO detector. SiPS 2009: 303-308
- [c38]
- 2008
- [j22]Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro: Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers. IJES 3(3): 128-140 (2008)
- [j21]Marjan Karkooti, Predrag Radosavljevic, Joseph R. Cavallaro: Configurable LDPC Decoder Architectures for Regular and Irregular Codes. Signal Processing Systems 53(1-2): 73-88 (2008)
- [c37]Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Cavallaro: Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards. ASAP 2008: 209-214
- [c36]Kiarash Amiri, Davood Shamsi, Behnaam Aazhang, Joseph R. Cavallaro: Adaptive codebook for beamforming in limited feedback MIMO systems. CISS 2008: 994-998
- [c35]Predrag Radosavljevic, Kyeong Jin Kim, Joseph R. Cavallaro: QRD-QLD Searching Based Sphere Detection for Emerging MIMO Downlink OFDM Receivers. GLOBECOM 2008: 4212-4216
- [c34]Kiarash Amiri, Chris Dick, Raghu Mysore Rao, Joseph R. Cavallaro: Novel Sort-Free Detector with Modified Real-Valued Decomposition (M-RVD) Ordering in MIMO Systems. GLOBECOM 2008: 4217-4221
- [c33]Predrag Radosavljevic, Joseph R. Cavallaro: Design of block-structured LDPC codes for iterative receivers with soft sphere detection. ICASSP 2008: 2693-2696
- [c32]
- [c31]
- [c30]Marjan Karkooti, Joseph R. Cavallaro: Cooperative Communications Using Scalable, Medium Block-length LDPC Codes. WCNC 2008: 88-93
- [p1]Sridhar Rajagopal, Joseph R. Cavallaro: Communication Processors for Wireless Systems. Wiley Encyclopedia of Computer Science and Engineering 2008
- 2007
- [j20]Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll: Special Issue on ASAP 2004 Conference. VLSI Signal Processing 49(1): 1-2 (2007)
- [c29]Markus Myllylä, Markku J. Juntti, Joseph R. Cavallaro: Implementation Aspects of List Sphere Detector Algorithms. GLOBECOM 2007: 3915-3920
- [c28]Yang Sun, Marjan Karkooti, Joseph R. Cavallaro: VLSI Decoder Architecture for High Throughput, Variable Block-size and Multi-rate LDPC Codes. ISCAS 2007: 2104-2107
- 2006
- [j19]Yuanbin Guo, Jianzhong (Charlie) Zhang, Dennis McCain, Joseph R. Cavallaro: An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture. EURASIP J. Adv. Sig. Proc. 2006 (2006)
- [j18]Yuanbin Guo, Dennis McCain, Joseph R. Cavallaro, Andres Takach: Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology. EURASIP J. Emb. Sys. 2006 (2006)
- [j17]Panagiotis Demestichas, Guillaume Vivier, Joseph R. Cavallaro: Special Issue on Reconfigurable Radio Technologies in Support of Ubiquitous Seamless Computing. MONET 11(6): 775-777 (2006)
- [j16]Sridhar Rajagopal, Joseph R. Cavallaro: Truncated Online Arithmetic with Applications to Communication Systems. IEEE Trans. Computers 55(10): 1240-12529 (2006)
- [j15]Yuanbin Guo, Joseph R. Cavallaro: A Low Complexity and Low Power SoC Design Architecture for Adaptive MAI Suppression in CDMA Systems. VLSI Signal Processing 44(3): 195-217 (2006)
- [c27]Marjan Karkooti, Predrag Radosavljevic, Joseph R. Cavallaro: Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation. ASAP 2006: 360-367
- [c26]Markus Myllylä, Pirkka Silvola, Markku J. Juntti, Joseph R. Cavallaro: Comparison of Two Novel List Sphere Detector Algorithms for MIMO-OFDM Systems. PIMRC 2006: 1-5
- [c25]Predrag Radosavljevic, Alexandre de Baynast, Marjan Karkooti, Joseph R. Cavallaro: Multi-Rate High-Throughput LDPC Decoder: Tradeoff Analysis Between Decoding Throughput and Area. PIMRC 2006: 1-5
- 2005
- [j14]S. Das, Elza Erkip, Joseph R. Cavallaro, Behnaam Aazhang: Low-complexity iterative multiuser detection and decoding for real-time applications. IEEE Transactions on Wireless Communications 4(4): 1455-1460 (2005)
- [c24]Yuanbin Guo, Jianzhong (Charlie) Zhang, Dennis McCain, Joseph R. Cavallaro: Displacement MIMO Kalman equalizer for CDMA downlink in fast fading channels. GLOBECOM 2005: 6
- [c23]Manik Gadhiok, Ricky Hardy, Patrick Murphy, J. Patrick Frantz, Hyeokho Choi, Joseph R. Cavallaro: An FPGA-Based Daughtercard for TI's C6000 family of DSKs. MSE 2005: 85-86
- 2004
- [j13]Sridhar Rajagopal, Joseph R. Cavallaro, Scott Rixner: Design Space Exploration for Real-Time Embedded Stream Processors. IEEE Micro 24(4): 54-66 (2004)
- [c22]Yuanbin Guo, Jianzhong (Charlie) Zhang, Dennis McCain, Joseph R. Cavallaro: Efficient MIMO equalization for downlink multi-code CDMA: complexity optimization and comparative study. GLOBECOM 2004: 2513-2519
- [c21]Alexandre de Baynast, Predrag Radosavljevic, Joseph R. Cavallaro: Chip-level LMMSE equalization for downlink MIMO CDMA in fast fading environments. GLOBECOM 2004: 2552-2556
- [c20]Yuanbin Guo, Dennis McCain, Joseph R. Cavallaro: Low complexity System-on-Chip architectures of Parallel-Residue-Compensation in CDMA systems. ISCAS (4) 2004: 77-80
- [c19]Marjan Karkooti, Joseph R. Cavallaro: Semi-Parallel Reconfigurable Architectures for Real-Time LDPC Decoding. ITCC (1) 2004: 579-585
- 2003
- [j12]Bryan A. Jones, Joseph R. Cavallaro: A Rapid Prototyping Environment for Wireless Communication Embedded Systems. EURASIP J. Adv. Sig. Proc. 2003(6): 603-614 (2003)
- [c18]Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro: Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers. ASAP 2003: 260-270
- [c17]Patrick Murphy, J. Patrick Frantz, Erik Welsh, Ricky Hardy, Tinoosh Mohsenin, Joseph R. Cavallaro: VALID: Custom ASIC Verification and FPGA Education Platform. MSE 2003: 64-65
- [c16]Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cavallaro: Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA. IEEE International Workshop on Rapid System Prototyping 2003: 179-185
- 2002
- [j11]Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. Cavallaro, Behnaam Aazhang: Real-time algorithms and architectures for multiuser channel estimation and detection in wireless base-station receivers. IEEE Transactions on Wireless Communications 1(3): 468-479 (2002)
- [j10]Gang Xu, Sridhar Rajagopal, Joseph R. Cavallaro, Behnaam Aazhang: VLSI Implementation of the Multistage Detector for Next Generation Wideband CDMA Receivers. VLSI Signal Processing 30(1-3): 21-33 (2002)
- [j9]Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. Cavallaro, Behnaam Aazhang: Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers. VLSI Signal Processing 31(2): 143-156 (2002)
- [j8]Joseph R. Cavallaro: Architectures for Heterogeneous Multi-Tier Networks. Wireless Personal Communications 22(2): 285-296 (2002)
- [c15]Martin L. Leuschen, Joseph R. Cavallaro, Ian D. Walker: Robotic Fault Detection using Nonlinear Analytical Redundancy. ICRA 2002: 456-463
- [c14]Yuanbin Guo, Joseph R. Cavallaro: Post-compensation of RF non-linearity in mobile OFDM systems by estimation of memory-less polynomial. ISCAS (1) 2002: 217-220
- [c13]Frank Livingston, Vikram Chandrasekhar, M. Vaya, Joseph R. Cavallaro: Handset detector architectures for DS-CDMA wireless systems. ISCAS (3) 2002: 265-268
- [c12]Yuanbin Guo, Joseph R. Cavallaro: A novel adaptive pre-distorter using LS estimation of SSPA non-linearity in mobile OFDM systems. ISCAS (3) 2002: 453-456
- 2001
- [j7]Chaitali Sengupta, Joseph R. Cavallaro, Behnaam Aazhang: On multipath channel estimation for CDMA systems using multiple sensors. IEEE Transactions on Communications 49(3): 543-553 (2001)
- [j6]Behnaam Aazhang, Joseph R. Cavallaro: Multitier Wireless Communications. Wireless Personal Communications 17(2-3): 323-330 (2001)
- [c11]Sridhar Rajagopal, Joseph R. Cavallaro: On-line Arithmetic for Detection in Digital Communication Receivers. IEEE Symposium on Computer Arithmetic 2001: 257-265
- [c10]Sridhar Rajagopal, Joseph R. Cavallaro: A bit-streaming, pipelined multiuser detector for wireless communication receivers. ISCAS (4) 2001: 128-131
- 2000
- [c9]Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. Cavallaro, Behnaam Aazhang: Efficient VLSI Architectures for Baseband Signal Processing in Wireless Base-Station Receivers. ASAP 2000: 173-184
1990 – 1999
- 1999
- [c8]Ian D. Walker, Joseph R. Cavallaro, Martin L. Leuschen: Keeping the Analog Genie in the Bottle: A Case for Digital Robots. ICRA 1999: 1063-1070
- 1998
- [j5]Chaitali Sengupta, Joseph R. Cavallaro, Behnaam Aazhang: Subspace-based tracking of multipath channel parameters for CDMA systems. European Transactions on Telecommunications 9(5): 439-447 (1998)
- 1997
- [c7]
- 1994
- [j4]Ian D. Walker, Joseph R. Cavallaro: Parallel VLSI architectures for real-time kinematics of redundant robots. Journal of Intelligent and Robotic Systems 9(1-2): 25-43 (1994)
- [j3]Nariankadu D. Hemkumar, Joseph R. Cavallaro: Redundant and On-Line CORDIC for Unitary Transformations. IEEE Trans. Computers 43(8): 941-954 (1994)
- [c6]M. L. Visinsky, Ian D. Walker, Joseph R. Cavallaro: New Dynamic Model-Based Fault Detection Thresholds for Robot Manipulators. ICRA 1994: 1388-1395
- 1993
- [j2]Kishore Kota, Joseph R. Cavallaro: Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors. IEEE Trans. Computers 42(7): 769-779 (1993)
- [c5]Nariankadu D. Hemkumar, Joseph R. Cavallaro: Efficient complex matrix transformations with CORDIC. IEEE Symposium on Computer Arithmetic 1993: 122-129
- [c4]M. L. Visinsky, Ian D. Walker, Joseph R. Cavallaro: Layered Dynamic Fault Detection and Tolerance for Robots. ICRA (2) 1993: 180-187
- [c3]Ian D. Walker, Joseph R. Cavallaro: Parallel VLSI Architectures for Real-Time Kinematics of Redundant Robots. ICRA (1) 1993: 870-877
- 1991
- [c2]Arati S. Deo, Joseph R. Cavallaro, Ian D. Walker: New Real-Time Robot Motion Algorithms Using Parallel VLSI Architectures. PPSC 1991: 369-375
1980 – 1989
- 1988
- [j1]Joseph R. Cavallaro, Franklin T. Luk: CORDIC Arithmetic for an SVD Processor. J. Parallel Distrib. Comput. 5(3): 271-290 (1988)
- 1987
- [c1]Joseph R. Cavallaro, Franklin T. Luk: CORDIC arithmetic for an SVD processor. IEEE Symposium on Computer Arithmetic 1987: 113-120
Coauthor Index
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last updated on 2013-05-02 19:06 CEST by the dblp team