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 | 2011 | |
|---|---|---|
| j6 |      | Abelardo López-Lagunas, Sek M. Chai: Streaming Data Movement for Real-Time Image Analysis. Signal Processing Systems 62(1): 29-42 (2011) |
| 2010 | ||
| j5 | | Sek M. Chai, Branislav Kisacanin, Nikolaos Bellas: Special issue on embedded vision. Computer Vision and Image Understanding 114(11): 1115 (2010) |
| c13 | | Konstantis Daloukas, Christos D. Antonopoulos, Nikolaos Bellas, Sek M. Chai: Fisheye lens distortion correction on multicore and hardware accelerator platforms. IPDPS 2010: 1-10 |
| 2009 | ||
| c12 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: Real-Time Fisheye Lens Distortion Correction Using Automatically Generated Streaming Accelerators. FCCM 2009: 149-156 |
| c11 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier, Abelardo López-Lagunas: Proteus: An architectural synthesis tool based on the stream programming paradigm. FPL 2009: 596-599 |
| 2007 | ||
| j4 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: Mapping streaming architectures on reconfigurable platforms. SIGARCH Computer Architecture News 35(3): 2-8 (2007) |
| c10 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: An Architectural Framework for Automated Streaming Kernel Selection. IPDPS 2007: 1-7 |
| 2006 | ||
| j3 | | Abelardo López-Lagunas, Sek M. Chai: Memory bandwidth optimization through stream descriptors. SIGARCH Computer Architecture News 34(1): 57-64 (2006) |
| c9 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: Template-Based Generation of Streaming Accelators from a High Level Presentation. FCCM 2006: 345-346 |
| c8 | | Abelardo López-Lagunas, Sek M. Chai: Compiler Manipulation of Stream Descriptors for Data Access Optimization. ICPP Workshops 2006: 337-344 |
| c7 | | Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators. IPDPS 2006 |
| 2005 | ||
| c6 | | |
| 2002 | ||
| j2 | | Sek M. Chai, D. Scott Wills: Systolic Opportunities for Multidimensional Data Streams. IEEE Trans. Parallel Distrib. Syst. 13(4): 388-398 (2002) |
| 2000 | ||
| j1 | | Sek M. Chai, Tarek M. Taha, D. Scott Wills, James D. Meindl: Heterogeneous architecture models for interconnect-motivated system design. IEEE Trans. VLSI Syst. 8(6): 660-670 (2000) |
| 1999 | ||
| c5 | | Sek M. Chai, Antonio Gentile, D. Scott Wills: Impact of Power Density Limitation in Gigascale Integration for the SIMD Pixel Processor. ARVLSI 1999: 57-71 |
| 1997 | ||
| c4 |  | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel: Power Constrained Design of Multiprocessor Interconnection Networks. ICCD 1997: 408-416 |
| c3 | | Phil May, Sek M. Chai, D. Scott Wills: HiPER-P: An Efficient, High-Performance Router for Multicomputer Interconnection Networks. PCRCW 1997: 103-118 |
| c2 | | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel: Power/Performance Trade-offs for Direct Networks. PCRCW 1997: 231-246 |
| 1993 | ||
| c1 | | D. Scott Wills, W. Stephen Lacy, Huy Cat, Michael A. Hopper, Ashutosh Razdan, Sek M. Chai: Pica: An Ultra-Light Processor for High-Througput Applications. ICCD 1993: 410-414 |
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