Chaitali Chakrabarti

Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola: Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and Real-Time FPGA Implementation. IEEE Transactions on Signal Processing 61(3): 633-647 (2013)

Yunus Emre, Chaitali Chakrabarti: Techniques for Compensating Memory Errors in JPEG2000. IEEE Trans. VLSI Syst. 21(1): 159-163 (2013)

Lifeng Miao, Stefanos Michael, Narayan Kovvali, Chaitali Chakrabarti, Antonia Papandreou-Suppappola: Multi-source Neural Activity Estimation and Sensor Scheduling: Algorithms and Hardware Implementation. Signal Processing Systems 70(2): 145-162 (2013)

Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti: Hardware Acceleration for Neuromorphic Vision Algorithms. Signal Processing Systems 70(2): 163-175 (2013)

Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti: Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding. EURASIP J. Adv. Sig. Proc. 2012: 211 (2012)

Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS. J. Solid-State Circuits 47(1): 23-34 (2012)

Chengen Yang, Yunus Emre, Chaitali Chakrabarti: Product Code Schemes for Error Correction in MLC NAND Flash Memories. IEEE Trans. VLSI Syst. 20(12): 2302-2314 (2012)

Qi Qi, Chaitali Chakrabarti: Parallel High Throughput Soft-Output Sphere Decoding Algorithm. Signal Processing Systems 68(2): 217-231 (2012)

Yunus Emre, Chaitali Chakrabarti: Quality-Aware Techniques for Reducing Power of JPEG Codecs. Signal Processing Systems 69(3): 227-237 (2012)

Ahmed Al-Maashri, Michael DeBole, Matthew Cotter, Nandhini Chandramoorthy, Yang Xiao, Vijaykrishnan Narayanan, Chaitali Chakrabarti: Accelerating neuromorphic vision algorithms for recognition. DAC 2012: 579-584

Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David Blaauw, Trevor N. Mudge: Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987

Lifeng Miao, Jun Jason Zhang, Antonia Papandreou-Suppappola, Chaitali Chakrabarti: Neural activity tracking using spatial compressive particle filtering. ICASSP 2012: 3461-3464

Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao: Hierarchical modeling of Phase Change memory for reliable design. ICCD 2012: 115-120

Ming Yang, Chaitali Chakrabarti: Design of orthogonal coded excitation for synthetic aperture imaging in ultrasound systems. ISCAS 2012: 113-116

Chi-Li Yu, Chaitali Chakrabarti: Transpose-free SAR imaging on FPGA platform. ISCAS 2012: 762-765

Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias: A top-down design methodology using virtual platforms for concept development. ISQED 2012: 444-450

Samatha Gummalla, Anupama R. Subramaniam, Yu Cao, Chaitali Chakrabarti: An analytical approach to efficient circuit variability analysis in scaled CMOS design. ISQED 2012: 641-647

Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti: Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell PRAM. SiPS 2012: 114-119

Yunus Emre, Chengen Yang, Ketul Sutaria, Yu Cao, Chaitali Chakrabarti: Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques. SiPS 2012: 125-130

Ming Yang, Siyuan Wei, Chaitali Chakrabarti: Reducing the Complexity of Orthogonal Code Based Synthetic Aperture Ultrasound System. SiPS 2012: 270-275

Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan: Multidimensional DFT IP Generator for FPGA Platforms. IEEE Trans. on Circuits and Systems 58-I(4): 755-764 (2011)

Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Chaitali Chakrabarti: Accurate Area, Time and Power Models for FPGA-Based Implementations. Signal Processing Systems 63(1): 39-50 (2011)

Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti: FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data. Signal Processing Systems 64(1): 109-122 (2011)

Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola: Algorithm and Parallel Implementation of Particle Filtering and its Use in Waveform-Agile Sensing. Signal Processing Systems 65(2): 211-227 (2011)

Yunus Emre, Chaitali Chakrabarti: Low energy motion estimation via selective aproximations. ASAP 2011: 176-183

Srinidhi Kestur, Kevin M. Irick, Sungho Park, Ahmed Al-Maashri, Vijaykrishnan Narayanan, Chaitali Chakrabarti: An algorithm-architecture co-design framework for gridding reconstruction using FPGAs. DAC 2011: 585-590

Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design. DAC 2011: 990-995

Yunus Emre, Chaitali Chakrabarti: Data-path and memory error compensation technique for low power JPEG implementation. ICASSP 2011: 1589-1592

Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: Energy-optimized high performance FFT processor. ICASSP 2011: 1701-1704

Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan: A framework for accelerating neuromorphic-vision algorithms on FPGAs. ICCAD 2011: 810-813

Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining. ISSCC 2011: 342-344

Chengen Yang, Yunus Emre, Chaitali Chakrabarti, Trevor N. Mudge: Flexible product code-based ECC schemes for MLC NAND Flash memories. SiPS 2011: 255-260

Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti: A hardware architecture for accelerating neuromorphic vision algorithms. SiPS 2011: 355-360

Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola, Narayan Kovvali: Real-time closed-loop tracking of an unknown number of neural sources using probability hypothesis density particle filtering. SiPS 2011: 367-372

Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti: LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches. VLSI Design 2011: 298-303

Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti: Mobile Supercomputers for the Next-Generation Cell Phone. IEEE Computer 43(1): 81-85 (2010)

Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: AnySP: Anytime Anywhere Anyway Signal Processing. IEEE Micro 30(1): 81-91 (2010)

Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudge: A Low-Power DSP for Wireless Communications. IEEE Trans. VLSI Syst. 18(9): 1310-1322 (2010)

Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, Sai Prashanth Muralidhara, Hui Zhao, Mahmut T. Kandemir, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun: A special-purpose compiler for look-up table and code generation for function evaluation. DATE 2010: 1130-1135

Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam, Judit Martinez Bauza: A distributed psycho-visually motivated Canny edge detector. ICASSP 2010: 822-825

Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan: Bandwidth-intensive FPGA architecture for multi-dimensional DFT. ICASSP 2010: 1486-1489

Yunus Emre, Chaitali Chakrabarti: Energy-aware adaptive OFDM systems. ICASSP 2010: 1590-1593

Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge: Diet SODA: a power-efficient processor for digital cameras. ISLPED 2010: 79-84

Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun: An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization. IEEE Trans. Computers 58(12): 1654-1667 (2009)

Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy: Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering. IEEE Trans. on CAD of Integrated Circuits and Systems 28(8): 1127-1137 (2009)

Yuming Zhu, Chaitali Chakrabarti: Architecture-aware LDPC code design for multiprocessor software defined radio systems. IEEE Transactions on Signal Processing 57(9): 3679-3692 (2009)

Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang, Sarma B. K. Vrudhula: Maximizing the Lifetime of Embedded Systems Powered by Fuel Cell-Battery Hybrids. IEEE Trans. VLSI Syst. 17(1): 22-32 (2009)

Ye Li, Martin Reisslein, Chaitali Chakrabarti: Energy-Efficient Video Transmission Over a Wireless Link. IEEE T. Vehicular Technology 58(3): 1229-1244 (2009)

Veera Papirla, Chaitali Chakrabarti: Energy-aware error control coding for Flash memories. DAC 2009: 658-663

Niranjan D. Narvekar, Bharatan Konnanath, Shalin Mehta, Santosh Chintalapati, Ismail AlKamal, Chaitali Chakrabarti, Lina J. Karam: An H.264/SVC memory architecture supporting spatial and course-grained quality scalabilities. ICIP 2009: 2661-2664

Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: AnySP: anytime anywhere anyway signal processing. ISCA 2009: 128-139

Veera Papirla, Aarul Jain, Chaitali Chakrabarti: Low power robust signal processing. ISLPED 2009: 303-306

Sangwon Seo, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Sunfaram Vijay, Chaitali Chakrabarti: Customizing wide-SIMD architectures for H.264. ICSAMOS 2009: 172-179

Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti: FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data. SiPS 2009: 121-126

Jianli Zhuo, Chaitali Chakrabarti: Energy-efficient dynamic task scheduling algorithms for DVS systems. ACM Trans. Embedded Comput. Syst. 7(2) (2008)

Kyungsoo Lee, Naehyuck Chang, Jianli Zhuo, Chaitali Chakrabarti, Sudheendra Kadri, Sarma B. K. Vrudhula: A fuel-cell-battery hybrid for portable embedded systems. ACM Trans. Design Autom. Electr. Syst. 13(1) (2008)

Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabarti: Accurate models for estimating area and power of FPGA implementations. ICASSP 2008: 1417-1420

Younghyun Kim, Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Nam Ik Cho: Extending the lifetime of media recorders constrained by battery and flash memory size. ISLPED 2008: 159-164

Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztián Flautner: From SODA to scotch: The evolution of a wireless baseband processor. MICRO 2008: 152-163

Yuan Lin, Yoonseo Choi, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti: A parameterized dataflow language extension for embedded streaming systems. ICSAMOS 2008: 10-17

Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan: Efficient image reconstruction using partial 2D Fourier transform. SiPS 2008: 49-54

Bhavana B. Manjunath, Aaron S. Williams, Chaitali Chakrabarti, Antonia Papandreou-Suppappola: Efficient mapping of advanced signal processing algorithms on multi-processor architectures. SiPS 2008: 269-274

Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: SODA: A High-Performance DSP Architecture for Software-Defined Radio. IEEE Micro 27(1): 114-123 (2007)

Ye Li, Bertan Bakkaloglu, Chaitali Chakrabarti: A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends. IEEE Trans. VLSI Syst. 15(1): 90-103 (2007)

Sung-Hoon Oh, Hang Song, James T. Aberle, Bertan Bakkaloglu, Chaitali Chakrabarti: Automatic antenna-tuning unit for software-defined and cognitive radio. Wireless Communications and Mobile Computing 7(9): 1103-1115 (2007)

Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang: Dynamic Power Management with Hybrid Power Sources. DAC 2007: 871-876

Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun: TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms. FPL 2007: 68-73

Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy, Chaitali Chakrabarti: Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering. ICCAD 2007: 199-204

Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti: Throughput of multi-core processors under thermal constraints. ISLPED 2007: 201-206

Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang: Energy management of DVS-DPM enabled embedded systems powered by fuel cell-battery hybrid source. ISLPED 2007: 322-327

Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: The Next Generation Challenge for Software Defined Radio. SAMOS 2007: 343-354

Qi Qi, Chaitali Chakrabarti: Sphere Decoding for Multiprocessor Architectures. SiPS 2007: 50-55

Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali Chakrabarti: Design and Analysis of LDPC Decoders for Software Defined Radio. SiPS 2007: 210-215

Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan: Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations. SiPS 2007: 463-468

Rahim Khoja, Mehul Marolia, Tinku Acharya, Chaitali Chakrabarti: A coprocessor architecture for fast protein structure prediction. Pattern Recognition 39(12): 2494-2505 (2006)

Yuming Zhu, L. Li, Chaitali Chakrabarti: Study of energy and performance of space-time decoding systems in concatenation with turbo decoding. IEEE Trans. VLSI Syst. 14(1): 86-90 (2006)

Tinku Acharya, Chaitali Chakrabarti: A Survey on Lifting-based Discrete Wavelet Transform Architectures. VLSI Signal Processing 42(3): 321-339 (2006)

Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula: Extending the lifetime of fuel cell based hybrid systems. DAC 2006: 562-567

Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Sarma B. K. Vrudhula: High-level power management of embedded systems with application-specific energy cost functions. DAC 2006: 568-573

Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: SODA: A Low-power Architecture For Software Radio. ISCA 2006: 89-101

Hyunseok Lee, Trevor N. Mudge, Chaitali Chakrabarti: Reducing idle mode power in software defined radio terminals. ISLPED 2006: 101-106

Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang: An optimal analytical solution for processor speed control with thermal constraints. ISLPED 2006: 292-297

Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula: Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids. ISLPED 2006: 424-429

Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner: Design and Implementation of Turbo Decoders for Software Defined Radio. SiPS 2006: 22-27

Yuming Zhu, Chaitali Chakrabarti: Architecture-Aware LDPC Code Design for Software Defined Radio. SiPS 2006: 405-410

G. Chen, Liping Xue, J. Kim, Kanwaldeep Sobti, Lanping Deng, Xiaobai Sun, Nikos Pitsianis, Chaitali Chakrabarti, Mahmut T. Kandemir, N. Vijaykhshnan: Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations. SoCC 2006: 113-114

M. Tiwari, Yuming Zhu, Chaitali Chakrabarti: Memory sub-banking scheme for high throughput MAP-based SISO decoders. IEEE Trans. VLSI Syst. 13(4): 494-498 (2005)

Jianli Zhuo, Chaitali Chakrabarti: An efficient dynamic task scheduling algorithm for battery powered DVS systems. ASP-DAC 2005: 846-849

Jianli Zhuo, Chaitali Chakrabarti: System-level energy-efficient dynamic task scheduling. DAC 2005: 628-631

Todd M. Austin, David Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne Wolf: Mobile Supercomputers. IEEE Computer 37(5): 81-83 (2004)

Wen-Tsong Shiue, Chaitali Chakrabarti: Multi-Module Multi-Port Memory Design for Low Power Embedded Systems. Design Autom. for Emb. Sys. 9(4): 235-261 (2004)

Russell Henning, Chaitali Chakrabarti: An approach for adaptively approximating the Viterbi algorithm to reduce power consumption while decoding convolutional codes. IEEE Transactions on Signal Processing 52(5): 1443-1451 (2004)

Hafijur Rahman, Chaitali Chakrabarti: A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage. ISCAS (2) 2004: 297-300

Sumant Bhutoria, Chaitali Chakrabarti: Parameterized SoC design for portable systems. ISCAS (2) 2004: 449-452

Jameel Ahmed, Chaitali Chakrabarti: A dynamic task scheduling algorithm for battery powered DVS systems. ISCAS (2) 2004: 813-816

Ali Manzak, Chaitali Chakrabarti: Optimum Buffer Size for Dynamic Voltage Processors. PATMOS 2004: 711-721

Kishore Andra, Chaitali Chakrabarti, Tinku Acharya: A high-performance JPEG2000 architecture. IEEE Trans. Circuits Syst. Video Techn. 13(3): 209-218 (2003)

Ali Manzak, Chaitali Chakrabarti: Variable voltage task scheduling algorithms for minimizing energy/power. IEEE Trans. VLSI Syst. 11(2): 270-276 (2003)

Kishore Andra, Chaitali Chakrabarti, Tinku Acharya: A VLSI architecture for lifting-based forward and inverse wavelet transform. IEEE Transactions on Signal Processing 50(4): 966-977 (2002)

Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti: Battery-conscious task sequencing for portable devices including voltage/clock scaling. DAC 2002: 189-194

Jagadeesh Kaza, Chaitali Chakrabarti: Energy-efficient turbo decoder. ICASSP 2002: 3093-3096

Kishore Andra, Chaitali Chakrabarti, Tinku Acharya: A high performance JPEG2000 architecture. ISCAS (1) 2002: 765-768

Rusell E. Henning, Chaitali Chakrabarti: Low-power approach for decoding convolutional codes with adaptive viterbi algorithm approximations. ISLPED 2002: 68-71

Wen-Tsong Shiue, Sathishkumar Udayanarayanan, Chaitali Chakrabarti: Data memory design and exploration for low-power embedded systems. ACM Trans. Design Autom. Electr. Syst. 6(4): 553-568 (2001)

Sathishkumar Udayanarayanan, Chaitali Chakrabarti: Address Code Generation for Digital Signal Processors. DAC 2001: 353-358

Ali Manzak, Chaitali Chakrabarti: Voltage Scaling for Energy Minimization with QoS Constraints. ICCD 2001: 438-446

Ali Manzak, Chaitali Chakrabarti: Variable voltage task scheduling algorithms for minimizing energy. ISLPED 2001: 279-282

Chaitali Chakrabarti, Lori E. Lucke: VLSI architectures for weighted order statistic (WOS) filters. Signal Processing 80(8): 1419-1433 (2000)

Kishore Andra, Tinku Acharya, Chaitali Chakrabarti: A Multi-Bit Binary Arithmetic Coding Technique. ICIP 2000: 928-931

Sathishkumar Udayanarayanan, Chaitali Chakrabarti: Energy-efficient code generation for DSP56000 family (poster session). ISLPED 2000: 247-249

Russell Henning, Chaitali Chakrabarti: Relating Data Characteristics to Transition Activity in High-Level Static CMOS Design. VLSI Design 2000: 38-43

Wen-Tsong Shiue, Chaitali Chakrabarti: Memory Exploration for Low Power, Embedded Systems. DAC 1999: 140-145

Wen-Tsong Shiue, Chaitali Chakrabarti: Memory exploration for low power embedded systems. ISCAS (1) 1999: 250-253

Ali Manzak, Chaitali Chakrabarti: A low power scheduling scheme with resources operating at multiple voltages. ISCAS (1) 1999: 354-357

Rusell E. Henning, Chaitali Chakrabarti: High-Level Design Synthesis of a Low Power, VLIW Processor for the IS-54 VSELP Speech Encoder. ICCD 1997: 571-576

Hsiang-Ling Li, Chaitali Chakrabarti: Motion estimation of two-dimensional objects based on the straight line hough transform: A new approach. Pattern Recognition 29(8): 1245-1258 (1996)

Hsiang-Ling Li, Chaitali Chakrabarti: A new architecture for the Viterbi decoder for code rate k/n. IEEE Transactions on Communications 44(2): 158-164 (1996)

Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens: Architectures for wavelet transforms: A survey. VLSI Signal Processing 14(2): 171-192 (1996)

Hsiang-Ling Li, Chaitali Chakrabarti: A New Architecture for the Viterbi Decoder for Code Rate k/n1. IEEE Transactions on Communications 43(12): 3101 (1995)

Gagan Gupta, Chaitali Chakrabarti: Architectures for hierarchical and other block matching algorithms. IEEE Trans. Circuits Syst. Video Techn. 5(6): 477-489 (1995)

Lori Lucke, Chaitali Chakrabarti: A digit-serial architecture for gray-scale morphological filtering. IEEE Transactions on Image Processing 4(3): 387-391 (1995)

Chaitali Chakrabarti, Mohan Vishwanath: Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers. IEEE Transactions on Signal Processing 43(3): 759-771 (1995)

Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke: Low power data format converter design using semi-static register allocation. ICCD 1995: 460-465

Hsiang-Ling Li, Chaitali Chakrabarti: A New Viterbi Decoder Design for Code Rate K/N. ISCAS 1995: 549-552

Chaitali Chakrabarti, Li-Yu Wang: Novel sorting network-based architectures for rank order filters. IEEE Trans. VLSI Syst. 2(4): 502-507 (1994)

Chaitali Chakrabarti, Lori Lucke: Efficient Architectures for Hidden Surface Removal. ICIP (1) 1994: 661-665

Chaitali Chakrabarti, Li-Yu Wang: Novel Sorting Netowrk-Based Architectures for Rank Order Filters. ISCAS 1994: 89-93

Srikanth Karkada, Chaitali Chakrabarti, Andreas Spanias: High Sample Rate Architectures for Block Adaptive Filters. ISCAS 1994: 131-134

Lori Lucke, Chaitali Chakrabarti: A Digit-Serial Architecture for Gray-Scale Morphological Filtering. ISCAS 1994: 207-210

Gagan Gupta, Chaitali Chakrabarti: VLSI Architectures for Hierarchical Block Matching. ISCAS 1994: 215-218

Chaitali Chakrabarti, D. Raghuramireddy, Rolf Unbehauen: Comments on `Highly modular systolic structures for denominator-separable 2-D recursive filters' [and reply]. IEEE Transactions on Signal Processing 41(4): 1734-1736 (1993)

Chaitali Chakrabarti: Efficient stack filter implementations of rank order filters. ISCAS 1993: 958-961

Chaitali Chakrabarti, Joseph JáJá: VLSI Architectures for Multidimensional Transforms. IEEE Trans. Computers 40(9): 1053-1057 (1991)

Chaitali Chakrabarti, Joseph JáJá: Systolic Architectures for the Computation of the Discrete Hartley and the Discrete Cosine Transforms Based on Prime Factor Decomposition. IEEE Trans. Computers 39(11): 1359-1368 (1990)