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P. P. Chakrabarti
Partha Pratim Chakrabarti
Author information
- Indian Institute of Technology, Kharagpur
2010 – today
- 2013
[j70]Aritra Hazra, Priyankar Ghosh, Satya Gautam Vadlamudi, P. P. Chakrabarti, Pallab Dasgupta: Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications. Embedded Systems Letters 5(1): 8-11 (2013)- [c77]Saptarshi Roy, Amit Patra, Partha Pratim Chakrabarti, Purnendu Sinha, Dipankar Das: Prediction Schemes for Compensating Variable Delay for Improving Performance of Real-Time Control Tasks. VLSI Design 2013: 19-24
- 2012
- [j69]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti: Cohesive Coverage Management: Simulation Meets Formal Methods. J. Electronic Testing 28(4): 449-468 (2012)
- [j68]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: SAT based timing analysis for fixed and rise/fall gate delay models. Integration 45(4): 357-364 (2012)
- [j67]Priyankar Ghosh, A. Sharma, P. P. Chakrabarti, Pallab Dasgupta: Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures. J. Artif. Intell. Res. (JAIR) 44: 275-333 (2012)
- [j66]Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A dynamic assertion-based verification platform for validation of UML designs. ACM SIGSOFT Software Engineering Notes 37(1): 1-14 (2012)
- [j65]Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta: Symbolic-Event-Propagation-Based Minimal Test Set Generation for Robust Path Delay Faults. ACM Trans. Design Autom. Electr. Syst. 17(4): 47 (2012)
- [j64]Pravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar: Online Scheduling of Dynamic Task Graphs with Communication and Contention for Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 23(1): 126-133 (2012)
- [c76]Priyankar Ghosh, Partha Pratim Chakrabarti, Pallab Dasgupta: Anytime Algorithms for Biobjective Heuristic Search. Australasian Conference on Artificial Intelligence 2012: 230-241
- [c75]Satya Gautam Vadlamudi, Piyush Gaurav, Sandip Aine, Partha Pratim Chakrabarti: Anytime Column Search. Australasian Conference on Artificial Intelligence 2012: 254-265
- [c74]Sudip Roy, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya: Algorithms for On-Chip Solution Preparation Using Digital Microfluidic Biochips. ISVLSI 2012: 7-8
- [c73]Priyankar Ghosh, P. P. Chakrabarti, Pallab Dasgupta: Execution Ordering in AND/OR Graphs with Failure Probabilities. SOCS 2012
- [c72]Sathyam K. Pattanam, P. P. Chakrabarti, Mahesh Mahendale, Srikanth Jadcherla, Seer Akademi, Vikas Gautham, Raju Bala Showry Pudota: Panel Discussion: SoC Realization - A Bridge to New Horizons or a Bridge to Nowhere? VLSI Design 2012: 38
- 2011
- [j63]Arnab Sarkar, A. Shanker, Sujoy Ghose, P. P. Chakrabarti: A Low-Overhead Partition-Oriented ERfair Scheduler for Hard Real-Time Embedded Systems. Embedded Systems Letters 3(1): 5-8 (2011)
- [j62]Arnab Sarkar, Sujoy Ghose, P. P. Chakrabarti: Sticky-ERfair: a task-processor affinity aware proportional fair scheduler. Real-Time Systems 47(4): 356-377 (2011)
- [j61]Arnab Sarkar, Sujoy Ghose, P. P. Chakrabarti: A Corrigendum to: "Sticky-ERfair: a task-processor affinity aware proportional fair scheduler". Real-Time Systems 47(4): 382-385 (2011)
- [j60]Satya Gautam Vadlamudi, Sandip Aine, Partha Pratim Chakrabarti: $\hbox {MAWA}^{\ast }$ - A Memory-Bounded Anytime Heuristic-Search Algorithm. IEEE Transactions on Systems, Man, and Cybernetics, Part B 41(3): 725-735 (2011)
- [c71]Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha: A framework for early stage quality-fault tolerance analysis of embedded control systems. DSN 2011: 315-322
- [c70]Dipankar Das, P. P. Chakrabarti, Purnendu Sinha: Robust embedded software design through early analysis of quality faults. ISEC 2011: 31-40
- [c69]Sudip Roy, Bhargab B. Bhattacharya, Partha Pratim Chakrabarti, Krishnendu Chakrabarty: Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip. VLSI Design 2011: 171-176
- 2010
- [j59]Sandip Aine, P. P. Chakrabarti, Rajeev Kumar: Heuristic search under contract. Computational Intelligence 26(4): 386-419 (2010)
- [j58]Arnab Sarkar, P. P. Chakrabarti, Sujoy Ghose: Partition oriented frame based fair scheduler. J. Parallel Distrib. Comput. 70(7): 707-718 (2010)
- [j57]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Bounded delay timing analysis and power estimation using SAT. Microelectronics Journal 41(5): 317-324 (2010)
- [j56]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar: Thermal analysis of multiprocessor SoC applications by simulation and verification. ACM Trans. Design Autom. Electr. Syst. 15(2) (2010)
- [c68]Sandip Aine, P. P. Chakrabarti, Rajeev Kumar: Contract Search: Heuristic Search under Node Expansion Constraints. ECAI 2010: 733-738
- [c67]Sandip Aine, P. P. Chakrabarti: An analysis of breadth-first beam search using uniform cost trees. ISAIM 2010
- [c66]
- [c65]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti: Coverage Management with Inline Assertions and Formal Test Points. VLSI Design 2010: 140-145
- [c64]Arijit Mondal, Partha Pratim Chakrabarti, Pallab Dasgupta: Accelerating Synchronous Sequential Circuits Using an Adaptive Clock. VLSI Design 2010: 176-181
2000 – 2009
- 2009
- [j55]Sandip Aine, Rajeev Kumar, P. P. Chakrabarti: Adaptive parameter control of evolutionary algorithms to improve quality-time trade-off. Appl. Soft Comput. 9(2): 527-540 (2009)
- [j54]Arnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti: Design intent coverage revisited. ACM Trans. Design Autom. Electr. Syst. 14(1) (2009)
- [j53]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar: Scenario-based timing verification of multiprocessor embedded applications. ACM Trans. Design Autom. Electr. Syst. 14(3) (2009)
- [c63]Arnab Sarkar, Sarthak Swaroop, Sujoy Ghose, Partha Pratim Chakrabarti: ERfair Scheduler with Processor Shutdown. HiPC 2009: 4-12
- [c62]Partha Pratim Chakrabarti, Sandip Aine: New Approaches to Design and Control of Time Limited Search Algorithms. PReMI 2009: 1-6
- [c61]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti: Inline Assertions - Embedding Formal Properties in a Test Bench. VLSI Design 2009: 71-76
- 2008
- [j52]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Auxiliary state machines + context-triggered properties in verification. ACM Trans. Design Autom. Electr. Syst. 13(4) (2008)
- [j51]S. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar: Simulation-based verification using Temporally Attributed Boolean Logic. ACM Trans. Design Autom. Electr. Syst. 13(4) (2008)
- [j50]Pravanjan Choudhury, Rajeev Kumar, P. P. Chakrabarti: Hybrid Scheduling of Dynamic Task Graphs with Selective Duplication for Multiprocessors under Memory and Time Constraints. IEEE Trans. Parallel Distrib. Syst. 19(7): 967-980 (2008)
- [j49]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Satisfiability Models for Maximum Transition Power. IEEE Trans. VLSI Syst. 16(8): 941-951 (2008)
- [c60]Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227
- [c59]Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan: Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI 2008: 251-256
- 2007
- [j48]Arijit Mondal, Partha Pratim Chakrabarti, Pallab Dasgupta: Statistical static timing analysis using symbolic event propagation. IET Circuits, Devices & Systems 1(4): 283-291 (2007)
- [j47]Bhaskar Pal, Arnab Sinha, Pallab Dasgupta, P. P. Chakrabarti, Kaushik De: Hardware accelerated constrained random test generation. IET Computers & Digital Techniques 1(4): 423-433 (2007)
- [j46]Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: BUSpec: A framework for generation of verification aids for standard bus protocol specifications. Integration 40(3): 285-304 (2007)
- [j45]Sandip Aine, P. P. Chakrabarti, Rajeev Kumar: An Automated Meta-Level Control Framework for Optimizing the Quality-Time Tradeoff of VLSI Algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 1992-2008 (2007)
- [j44]Abhishek Somani, P. P. Chakrabarti, Amit Patra: An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions. IEEE Trans. Evolutionary Computation 11(3): 336-353 (2007)
- [j43]Tathagato Rai Dastidar, P. P. Chakrabarti: A verification system for transient response of analog circuits. ACM Trans. Design Autom. Electr. Syst. 12(3) (2007)
- [j42]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Design Autom. Electr. Syst. 12(3) (2007)
- [j41]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar: Functional verification of task partitioning for multiprocessor embedded systems. ACM Trans. Design Autom. Electr. Syst. 12(4) (2007)
- [c58]Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta: Timing Analysis of Sequential Circuits Using Symbolic Event Propagation. ICCTA 2007: 151-157
- [c57]Sandip Aine, P. P. Chakrabarti, Rajeev Kumar: AWA* - A Window Constrained Anytime Heuristic Search Algorithm. IJCAI 2007: 2250-2255
- [c56]S. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar: Simulation Based Verification using Temporally Attributed Boolean Logic. VLSI Design 2007: 57-62
- [c55]Pravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar: Online Dynamic Voltage Scaling using Task Graph Mapping Analysis for Multiprocessors. VLSI Design 2007: 89-94
- [c54]Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti: A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis. VLSI Design 2007: 95-102
- [c53]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Bounded Delay Timing Analysis Using Boolean Satisfiability. VLSI Design 2007: 295-302
- 2006
- [j40]Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar: Frame-Based Proportional Round-Robin. IEEE Trans. Computers 55(9): 1121-1129 (2006)
- [j39]Arijit Mondal, P. P. Chakrabarti: Reasoning about timing behavior of digital circuits using symbolic event propagation and temporal logic. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1793-1814 (2006)
- [j38]Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1922-1934 (2006)
- [c52]Dipankar Das, Rajeev Kumar, P. P. Chakrabarti: Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. APSEC 2006: 199-208
- [c51]Prasenjit Basu, Sayantan Das, Pallab Dasgupta, Partha Pratim Chakrabarti: Discovering the input assumptions in specification refinement coverage. ASP-DAC 2006: 13-18
- [c50]Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti: Synthesis of system verilog assertions. DATE Designers' Forum 2006: 70-75
- [c49]Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti: What lies between design intent coverage and model checking? DATE 2006: 1217-1222
- [c48]Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, S. K. Panda, P. P. Chakrabarti: SystemC Modeling and Validation of A RISC Processor System. FDL 2006: 189-197
- [c47]Abhishek Somani, P. P. Chakrabarti, Amit Patra: A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ISCAS 2006
- [c46]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal methods for checking realizability of coalitions in 3-party systems. MEMOCODE 2006: 198
- [c45]Diganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta: A Framework for Estimating Peak Power in Gate-Level Circuits. PATMOS 2006: 573-582
- [c44]Samik Das, P. P. Chakrabarti, Pallab Dasgupta: Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. VLSI Design 2006: 293-298
- [c43]Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar: Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems. VLSI Design 2006: 677-682
- [c42]Sandip Aine, P. P. Chakrabarti, Rajeev Kumar: Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control. VLSI Design 2006: 683-688
- 2005
- [j37]Rajeev Kumar, Amit Gupta, B. S. Pankaj, Mrinmoy Ghosh, P. P. Chakrabarti: Post-compilation optimization for multiple gains with pattern matching. SIGPLAN Notices 40(12): 14-23 (2005)
- [j36]Tathagato Rai Dastidar, P. P. Chakrabarti, Partha Ray: A synthesis system for analog circuits based on evolutionary search and topological reuse. IEEE Trans. Evolutionary Computation 9(2): 211-224 (2005)
- [j35]Arnab Roy, S. K. Panda, Rajeev Kumar, P. P. Chakrabarti: A framework for systematic validation and debugging of pipeline simulators. ACM Trans. Design Autom. Electr. Syst. 10(3): 462-491 (2005)
- [c41]Sandip Aine, Rajeev Kumar, P. P. Chakrabarti: An Adaptive Framework for Solving Multiple Hard Problems Under Time Constraints. CIS (1) 2005: 57-64
- [c40]Abhishek Somani, Partha Pratim Chakrabarti, Amit Patra: Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits. DATE 2005: 1064-1069
- [c39]Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Multiobjective EA Approach for Improved Quality of Solutions for Spanning Tree Problem. EMO 2005: 811-825
- [c38]Suchismita Roy, Sayantan Das, Prasenjit Basu, Pallab Dasgupta, Partha Pratim Chakrabarti: SAT based solutions for consistency problems in formal property specifications for open systems. ICCAD 2005: 885-888
- [c37]Sandip Aine, Rajeev Kumar, P. P. Chakrabarti: Adaptive Control of Anytime Algorithm Parameters. IICAI 2005: 72-87
- [c36]Tathagato Rai Dastidar, P. P. Chakrabarti: A Verification System for Transient Response of Analog Circuits Using Model Checking. VLSI Design 2005: 195-200
- [c35]Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix: Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design 2005: 201-206
- [c34]Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti: Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. VLSI Design 2005: 213-218
- [c33]Abhishek Somani, P. P. Chakrabarti, Amit Patra: A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. VLSI Design 2005: 535-538
- [c32]Dipankar Das, Rajeev Kumar, P. P. Chakrabarti: Dictionary Based Code Compression for Variable Length Instruction Encodings. VLSI Design 2005: 545-550
- 2004
- [j34]Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: The power of first-order quantification over states in branching and linear time temporal logics. Inf. Process. Lett. 91(5): 201-210 (2004)
- [c31]Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix: Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? DATE 2004: 668-669
- [c30]Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal: A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. DATE 2004: 1198-1203
- [c29]Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Improved Quality of Solutions for Multiobjective Spanning Tree Problem Using Distributed Evolutionary Algorithm. HiPC 2004: 494-503
- [c28]Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD 2004: 198-203
- [c27]Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Multiobjective Genetic Search for Spanning Tree Problem. ICONIP 2004: 218-223
- [c26]Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: Complexity of Compositional Model Checking of Computation Tree Logic on Simple Structures. IWDC 2004: 102-113
- [c25]Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Distributed Evolutionary Algorithm Search for Multiobjective Spanning Tree Problem. IWDC 2004: 538
- [c24]Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: The BUSpec platform for automated generation of verification aids for standard bus protocols. MEMOCODE 2004: 119-128
- [c23]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal Verification of Modules under Real Time Environment Constraints. VLSI Design 2004: 103-108
- [c22]Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan: Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. VLSI Design 2004: 109-114
- 2003
- [j33]Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: A Branching Time Temporal Framework for Quantitative Reasoning. J. Autom. Reasoning 30(2): 205-232 (2003)
- [c21]Ansuman Banerjee, Pallab Dasgupta, Partha Pratim Chakrabarti: Open computation tree logic with fairness. ISCAS (5) 2003: 249-252
- 2002
- [j32]Anindya C. Patthak, Indrajit Bhattacharya, Anirban Dasgupta, Pallab Dasgupta, P. P. Chakrabarti: Quantified Computation Tree Logic. Inf. Process. Lett. 82(3): 123-129 (2002)
- [j31]Pallab Dasgupta, P. P. Chakrabarti, Arnab Dey, Sujoy Ghose, Wolfgang Bibel: Solving Constraint Optimization Problems from CLP-Style Specifications Using Heuristic Search Techniques. IEEE Trans. Knowl. Data Eng. 14(2): 353-368 (2002)
- [c20]Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee: Formal verification of module interfaces against real time specifications. DAC 2002: 141-145
- [c19]Bipin Rajendran, Veerbhan Kheterpal, Abhishek Das, Jayanta Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti: Timing analysis of tree-like RLC circuits. ISCAS (4) 2002: 838-841
- [c18]Pallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti: Open Computation Tree Logic for Formal Verification of Modules. VLSI Design 2002: 735-740
- 2001
- [j30]Pallab Dasgupta, P. P. Chakrabarti, Jatindra Kumar Deka, Sriram Sankaranarayanan: Min-max Computation Tree Logic. Artif. Intell. 127(1): 137-162 (2001)
- [c17]Pallab Dasgupta, P. P. Chakrabarti, Amit Nandi, Sekar Krishna, Arindam Chakrabarti: Abstraction of word-level linear arithmetic functions from bit-level component descriptions. DATE 2001: 4-8
- [c16]S. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti: Symbolic verification of Boolean constraints over partially specified functions. ISCAS (5) 2001: 113-116
- [c15]Jatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti: Abstractions for model checking of event timings. ISCAS (5) 2001: 125-128
- 2000
- [j29]Pallab Dasgupta, Jatindra Kumar Deka, Partha Pratim Chakrabarti: Model checking on timed-event structures. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 601-611 (2000)
- [j28]Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths. IEEE Trans. VLSI Syst. 8(6): 747-750 (2000)
1990 – 1999
- 1999
- [j27]P. P. Chakrabarti: Partial Precedence Constrained Scheduling. IEEE Trans. Computers 48(10): 1127-1130 (1999)
- [j26]Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: A design space exploration scheme for data-path synthesis. IEEE Trans. VLSI Syst. 7(3): 331-338 (1999)
- [c14]Partha Pratim Chakrabarti, Pallab Dasgupta, Partha Pratim Das, Arnob Roy, Shuvendu K. Lahiri, Mrinal Bose: Controlling State Explosion in Static Simulation by Selective Composition. VLSI Design 1999: 226-231
- [c13]Jatindra Kumar Deka, Pallab Dasgupta, P. P. Chakrabarti: An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. VLSI Design 1999: 294-299
- [c12]Pankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti: Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. VLSI Design 1999: 324-
- 1998
- [j25]Sudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose: A Framework for Learning in Search-Based Systems. IEEE Trans. Knowl. Data Eng. 10(4): 563-575 (1998)
- [j24]Sudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose: Learning while solving problems in best first search. IEEE Transactions on Systems, Man, and Cybernetics, Part A 28(4): 535-541 (1998)
- 1997
- [c11]Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: Design Space Exploration for Data Path Synthesis. VLSI Design 1997: 166-173
- 1996
- [j23]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Searching Game Trees under a Partial Order. Artif. Intell. 82(1-2): 237-257 (1996)
- [j22]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Agent Search in Uniform b-Ary Trees: Multiple Goals and Unequal Costs. Inf. Process. Lett. 58(6): 311-318 (1996)
- [j21]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Multiobjektive Heuristic Search in AND/OR Graphs. J. Algorithms 20(2): 282-311 (1996)
- [j20]Chunduri Rama Mohan, Partha Pratim Chakrabarti: EARTH: combined state assignment of PLA-based FSM's targeting area and testability. IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 727-731 (1996)
- [c10]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A New Competitive Algorithm for Agent Searching in Unknown Streets. FSTTCS 1996: 147-155
- [c9]Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach. VLSI Design 1996: 122-125
- 1995
- [j19]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A Correction to "Agent Searching in a Tree and the Optimality of Iterative Deepening". Artif. Intell. 77(1): 173-176 (1995)
- [j18]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Utility of Pathmax in Partial Order Heuristic Search. Inf. Process. Lett. 55(6): 317-322 (1995)
- [c8]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A Near Optimal Algorithm for the Extended Cow-Path Problem in the Presence of Relative Errors. FSTTCS 1995: 22-36
- [c7]Chunduri Rama Mohan, Partha Pratim Chakrabarti: Combined optimization of area and testability during state assignment of PLA-based FSM's. VLSI Design 1995: 408-413
- 1994
- [j17]P. P. Chakrabarti: Algorithms for Searching Explicit AND/OR Graphs and their Applications to Problem Reduction Search. Artif. Intell. 65(2): 329-345 (1994)
- [j16]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Agent Searching in a Tree and the Optimality of Iterative Deepening. Artif. Intell. 71(1): 195-208 (1994)
- [j15]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Improving Greedy Algorithms by Lookahead-Search. J. Algorithms 16(1): 1-23 (1994)
- [c6]Chunduri Rama Mohan, Partha Pratim Chakrabarti: A new approach for factorizing FSM's. ICCAD 1994: 698-701
- [c5]Chunduri Rama Mohan, Partha Pratim Chakrabarti: A New Approach to Synthesis of PLA-Based FSM's. VLSI Design 1994: 373-378
- [c4]Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti, S. C. De Sarkar: Multiobjective Search in VLSI Design. VLSI Design 1994: 395-400
- 1993
- [c3]Chunduri Rama Mohan, Partha Pratim Chakrabarti, Sujoy Ghose: Combining State Assignment with PLA Folding. VLSI Design 1993: 9-14
- 1992
- [j14]Prabir K. Biswas, Jayanta Mukherjee, B. N. Chatterji, Partha Pratim Chakrabarti: Qualitative Description of Three-Dimensional Scenes. IJPRAI 6(4): 651-672 (1992)
- [j13]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Effective Use of Memory in Iterative Deepening Search. Inf. Process. Lett. 42(1): 47-52 (1992)
- [j12]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: A Simple 0.5-Bounded Greedy Algorithm for the 0/1 Knapsack Problem. Inf. Process. Lett. 42(3): 173-177 (1992)
- [j11]P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Generalized best first search using single and multiple heuristics. Inf. Sci. 60(1-2): 145-175 (1992)
- [j10]P. P. Chakrabarti, Sujoy Ghose: A General Best First Search Algorithm in AND/OR Graphs. J. Algorithms 13(2): 177-187 (1992)
- 1991
- [j9]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Reducing Reexpansions in Iterative-Deepening Search by Controlling Cutoff Bounds. Artif. Intell. 50(2): 207-221 (1991)
- [j8]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Multiple Stack Branch and Bound. Inf. Process. Lett. 37(1): 43-48 (1991)
1980 – 1989
- 1989
- [j7]P. P. Chakrabarti, Sujoy Ghose, Arup Acharya, S. C. De Sarkar: Heuristic Search in Restricted Memory. Artif. Intell. 41(2): 197-221 (1989)
- [j6]P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar: Increasing Search Efficiency Using Multiple Heuristics. Inf. Process. Lett. 30(1): 33-36 (1989)
- [j5]P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar: Increasing Search Efficiency Using Multiple Heuristics. Inf. Process. Lett. 32(5): 275 (1989)
- [c2]U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Pruning by Upperbounds in Heuristic Search: Use of Approximate Algorithms. KBCS 1989: 451-461
- 1988
- [c1]P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Best first search in and/or graphs. ACM Conference on Computer Science 1988: 256-261
- 1987
- [j4]P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Admissibility of A0* when Heuristics Overestimate. Artif. Intell. 34(1): 97-113 (1987)
- [j3]Partha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji: Generalized distances in digital geometry. Inf. Sci. 42(1): 51-67 (1987)
- [j2]Partha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji: Distance functions in digital geometry. Inf. Sci. 42(2): 113-136 (1987)
- 1986
- [j1]P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Heuristic Search Through Islands. Artif. Intell. 29(3): 339-347 (1986)
Coauthor Index
[j70] [j69] [j68] [j67] [j66] [j65] [c76] [c73] [j57] [c65] [c64] [j54] [c61] [j52] [j49] [c60] [c59] [j48] [j47] [j46] [j42] [c58] [c54] [c53] [j38] [c51] [c50] [c49] [c46] [c45] [c44] [c38] [c35] [c34] [j34] [c31] [c28] [c26] [c24] [c23] [c22] [j33] [c21] [j32] [j31] [c20] [c18] [j30] [c17] [c16] [c15] [j29] [c14] [c13] [c12] [j23] [j22] [j21] [c10] [j19] [j18] [c8] [j16] [c4]
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last updated on 2013-04-19 20:45 CEST by the dblp team