| 2013 | ||
|---|---|---|
| j12 | Kanad Chakraborty, James E. Kelly, Brian P. Evans: Novel Self-Timed, Pipelined Clock Scan Architecture. J. Electronic Testing 29(2): 241-247 (2013) | |
| 2012 | ||
| j11 | Kanad Chakraborty, Vishwani D. Agrawal: Data-Driven DPPM Estimation and Adaptive Fault Coverage Calibration Using MATLAB®. J. Electronic Testing 28(6): 869-875 (2012) | |
| 2010 | ||
| c9 | Kanad Chakraborty: A MATLAB-based technique for defect level estimation using data mining of test fallout data versus fault coverage. ISQED 2010: 418-421 | |
| 2008 | ||
| j10 | Maharaj Mukherjee, Kanad Chakraborty: A Randomized Greedy Method for Rectangular-Pattern Fill Problems. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1376-1384 (2008) | |
| c8 | Maharaj Mukherjee, Kanad Chakraborty: A Randomized Greedy Algorithm for the Pattern Fill Problem for DFM Applications. ISQED 2008: 344-347 | |
| 2006 | ||
| j9 | Kanad Chakraborty, Alexey Lvov, Maharaj Mukherjee: Novel algorithms for placement of rectangular covers for mask inspection in advanced lithography and other VLSI design applications. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 79-91 (2006) | |
| c7 | Venkat Rao Vallapenani, Ravi Shankar Chevuri, Bingxiong Xu, Lun Ye, Kanad Chakraborty: Efficient Techniques for Noise Characterization of Sequential Cells and Macros. VLSI Design 2006: 363-368 | |
| 2004 | ||
| j8 | Kanad Chakraborty: Testing and Reliability Techniques for High-Bandwidth Embedded RAMs. J. Electronic Testing 20(1): 89-108 (2004) | |
| 2002 | ||
| j7 | Maharaj Mukherjee, Kanad Chakraborty: A polynomial-time optimization algorithm for a rectilinear partitioning problem with applications in VLSI design automation. Inf. Process. Lett. 83(1): 41-48 (2002) | |
| 2001 | ||
| j6 | Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta: A physical design tool for built-in self-repairable RAMs. IEEE Trans. VLSI Syst. 9(2): 352-364 (2001) | |
| 2000 | ||
| j5 | Kanad Chakraborty, Pinaki Mazumder: New March Tests for Multiport RAM Devices. J. Electronic Testing 16(4): 389-395 (2000) | |
| c6 | Wilm E. Donath, Prabhakar Kudva, Leon Stok, Paul Villarrubia, Lakshmi N. Reddy, Andrew Sullivan, Kanad Chakraborty: Transformational Placement and Synthesis. DATE 2000: 194-201 | |
| 1999 | ||
| c5 | Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder: A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE 1999: 714- | |
| c4 | Kanad Chakraborty, Natesan Venkateswaran: Congestion Mitigation During Placement. Great Lakes Symposium on VLSI 1999: 228-229 | |
| 1998 | ||
| j4 | Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder: FTROM: A Silicon Compiler for Fault-tolerant ROMs. Integration 26(1-2): 117-140 (1998) | |
| c3 | Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder: A Silicon Compiler for Fault-Tolerant ROMs. DFT 1998: 270-275 | |
| 1997 | ||
| c2 | Kanad Chakraborty, Pinaki Mazumder: A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. ED&TC 1997: 330-334 | |
| 1996 | ||
| c1 | Kanad Chakraborty, Pinaki Mazumder: An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. ICCAD 1996: 685-688 | |
| 1994 | ||
| j3 | Kanad Chakraborty, Pinaki Mazumder: Technology and layout-related testing of static random-access memories. J. Electronic Testing 5(4): 347-365 (1994) | |
| j2 | Kanad Chakraborty, Kishan G. Mehrotra, Chilukuri K. Mohan, Sanjay Ranka: Response to letter by Q. Hu and D. B. Hertz. Neural Networks 7(1): 203-204 (1994) | |
| 1992 | ||
| j1 | Kanad Chakraborty, Kishan Mehrotra, Chilukuri K. Mohan, Sanjay Ranka: Forecasting the behavior of multivariate time series using neural networks. Neural Networks 5(6): 961-970 (1992) | |
Colors in the list of coauthors
Last update Sun May 26 02:29:15 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page