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 | 2009 | |
|---|---|---|
| c36 |      | Bing Li, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators. ISCAS 2009: 1545-1548 |
| 2008 | ||
| j8 | | Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan, Ka Nang Leung: A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. on Circuits and Systems 55-II(7): 653-657 (2008) |
| 2007 | ||
| j7 | | Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Priority-Based Heading One Detector in H.264/AVC Decoding. EURASIP J. Emb. Sys. 2007 (2007) |
| j6 | | Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. VLSI Signal Processing 47(3): 223-232 (2007) |
| 2006 | ||
| c35 | | Wang-Chi Cheng, Cheong-fat Chan, Suyi Tao, King-Keung Mok: 0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application. APCCAS 2006: 25-28 |
| c34 | | Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198 |
| c33 | | King-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: Adiabatic Smart Card. APCCAS 2006: 287-290 |
| c32 | | Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: 0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525 |
| c31 | | Chi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006 |
| c30 | | Wei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: An efficient MFCC extraction method in speech recognition. ISCAS 2006 |
| c29 | | Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A 0.5V fully differential OTA with local common feedback. ISCAS 2006 |
| c28 | | Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006 |
| c27 | | Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006 |
| c26 | | Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006 |
| 2005 | ||
| c25 | | Pui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155 |
| c24 | | Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282 |
| c23 | | Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun: Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002 |
| c22 | | Wei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845 |
| 2004 | ||
| j5 | | Jing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004) |
| j4 | | Pak-Kee Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Preparing smartcard for the future: from passive to active. IEEE Trans. Consumer Electronics 50(1): 245-250 (2004) |
| j3 | | Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: High Speed Curve Interpolating D/A Converter. VLSI Signal Processing 38(1): 5-11 (2004) |
| c21 | | Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554 |
| c20 |  | Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240 |
| c19 | | Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520 |
| c18 | | Wang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy: An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143 |
| c17 | | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710 |
| 2003 | ||
| c16 | | W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187 |
| c15 | | Pak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340 |
| c14 | | Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching: An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747 |
| c13 | | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430 |
| 2002 | ||
| c12 | | Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4 |
| c11 | | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32 |
| c10 | | Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140 |
| c9 | | Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca: A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224 |
| c8 | | Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368 |
| c7 | | Kin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712 |
| 2001 | ||
| j2 | | Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan: A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001) |
| c6 | | Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A low power asynchronous DES. ISCAS (4) 2001: 538-541 |
| c5 | | Lai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy: A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613 |
| c4 | | Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913 |
| 1999 | ||
| j1 | | Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-fat Chan, Wai-kuen Cham: A self-timed ICT chip for image coding. IEEE Trans. Circuits Syst. Video Techn. 9(6): 856-860 (1999) |
| c3 | | Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223 |
| 1998 | ||
| c2 | | Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-fat Chan: A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212- |
| 1997 | ||
| c1 | | Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-fat Chan, Wai-kuen Cham: Self-timed 1-D ICT processor. ASP-DAC 1997: 669-670 |
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