| 2012 | ||
|---|---|---|
| j4 | W. S. Zhao, Y. Zhang, T. Devolder, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, Pascale Mazoyer: Failure and reliability analysis of STT-MRAM. Microelectronics Reliability 52(9-10): 1848-1852 (2012) | |
| c10 | Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein, Djaafar Chabi, Claude Chappert: Nanodevice-based novel computing paradigms and the neuromorphic approach. ISCAS 2012: 2509-2512 | |
| c9 | Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert: MRAM crossbar based configurable logic block. ISCAS 2012: 2945-2948 | |
| i1 | Weisheng Zhao, Sumanta Chaudhuri, Celso Accoto, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer: Cross-point architecture for spin transfer torque magnetic random access memory. CoRR abs/1202.1782 (2012) | |
| 2011 | ||
| j3 | W. S. Zhao, T. Devolder, Yahya Lakys, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer: Design considerations and strategies for high-reliable STT-MRAM. Microelectronics Reliability 51(9-11): 1454-1458 (2011) | |
| c8 | Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert: Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC 2011: 275-280 | |
| c7 | Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitório Cargnini, Yahya Lakys, Jacques-Olivier Klein, Dafine Ravelosona, Gilles Sassatelli, Claude Chappert: Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI 2011: 431-436 | |
| c6 | Weisheng Zhao, Y. Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitório Cargnini, R. M. Brum, Yoann Guillemenet, Gilles Sassatelli: Embedded MRAM for high-speed computing. VLSI-SoC 2011: 37-42 | |
| 2010 | ||
| c5 | Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer: High Density Asynchronous LUT Based on Non-volatile MRAM Technology. FPL 2010: 374-379 | |
| c4 | Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer: Design of embedded MRAM macros for memory-in-logic applications. ACM Great Lakes Symposium on VLSI 2010: 155-158 | |
| 2009 | ||
| j2 | Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer: Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit. ACM Trans. Embedded Comput. Syst. 9(2) (2009) | |
| j1 | Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat: TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. TRETS 2(2) (2009) | |
| 2008 | ||
| c3 | Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer: Spintronic Device Based Non-volatile Low Standby Power SRAM. ISVLSI 2008: 40-45 | |
| 2007 | ||
| c2 | Weisheng Zhao, Eric Belhaire, Bernard Dieny, Guillaume Prenat, Claude Chappert: TAS-MRAM based Non-volatile FPGA logic circuit. FPT 2007: 153-160 | |
| c1 | Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit: Synthesis of Finite State Machines with Magnetic Domain Wall Logic. ISCAS 2007: 133-136 | |
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