| 2013 | ||
|---|---|---|
| c10 | Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, A. M. Kaushik, Hiren D. Patel: On the use of GP-GPUs for accelerating compute-intensive EDA applications. DATE 2013: 1357-1366 | |
| 2012 | ||
| c9 | Nicola Bombieri, Sara Vinco, Valeria Bertacco, Debapriya Chatterjee: SystemC simulation on GP-GPUs: CUDA vs. OpenCL. CODES+ISSS 2012: 343-352 | |
| c8 | Sara Vinco, Debapriya Chatterjee, Valeria Bertacco, Franco Fummi: SAGA: SystemC acceleration on GPU architectures. DAC 2012: 115-120 | |
| c7 | Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco: Checking architectural outputs instruction-by-instruction on acceleration platforms. DAC 2012: 955-961 | |
| c6 | Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco: Approximating checkers for simulation acceleration. DATE 2012: 153-158 | |
| 2011 | ||
| j1 | Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: Gate-Level Simulation with GPU Computing. ACM Trans. Design Autom. Electr. Syst. 16(3): 30 (2011) | |
| c5 | Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco: Simulation-based signal selection for state restoration in silicon debug. ICCAD 2011: 595-601 | |
| 2010 | ||
| c4 | Debapriya Chatterjee, Valeria Bertacco: EQUIPE: Parallel equivalence checking with GP-GPUs. ICCD 2010: 486-493 | |
| 2009 | ||
| c3 | Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: Event-driven gate-level simulation with GP-GPUs. DAC 2009: 557-562 | |
| c2 | Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: GCS: High-performance gate-level simulation with GPGPUs. DATE 2009: 1332-1337 | |
| c1 | Debapriya Chatterjee, Valeria Bertacco: Activity-based refinement for abstraction-guided simulation. HLDVT 2009: 146-153 | |
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