- CSB - MetaPress - Google - Bing - Yahoo
 | 2013 | |
|---|---|---|
| j84 |      | Yiannis Andreopoulos, Liang-Gee Chen, Brian L. Evans, Hong Jiang, Rakesh Kumar: Guest Editorial: Special Section on New Software/Hardware Paradigms for Error-Tolerant Multimedia Systems. IEEE Transactions on Multimedia 15(2): 241 (2013) |
| 2012 | ||
| j83 | | Yu-Chi Su, Keng-Yen Huang, Tse-Wei Chen, Yi-Min Tsai, Shao-Yi Chien, Liang-Gee Chen: A 52 mW Full HD 160-Degree Object Viewpoint Recognition SoC With Visual Vocabulary Processor for Wearable Vision Applications. J. Solid-State Circuits 47(4): 797-809 (2012) |
| j82 | | Chen-Han Tsai, Chi-Sun Tang, Liang-Gee Chen: A flexible fully hardwired CABAC encoder for UHDTV H.264/AVC high profile video. IEEE Trans. Consumer Electronics 58(4): 1329-1337 (2012) |
| j81 | | Tse-Wei Chen, Yu-Chi Su, Keng-Yen Huang, Yi-Min Tsai, Shao-Yi Chien, Liang-Gee Chen: Visual Vocabulary Processor Based on Binary Tree Architecture for Real-Time Object Recognition in Full-HD Resolution. IEEE Trans. VLSI Syst. 20(12): 2329-2332 (2012) |
| c170 | | Chia-Hsiang Lee, Yu-Chi Su, Liang-Gee Chen: Accurate positioning system based on street view recognition. ICASSP 2012: 2305-2308 |
| c169 | | Keng-Yen Huang, Yi-Min Tsai, Tien-Ju Yang, Liang-Gee Chen: A high speed feature matching architecture for real-time video stabilization. ISCAS 2012: 1436-1439 |
| c168 | | Yun-Yu Chen, Tung-Chien Chen, Chien-Chung Chen, Hsin-I. Liao, Luk-Ting Sio, Liang-Gee Chen: Exploration of reusing the pre-recorded training data set to improve the supervised classifier for EEG-based motor-imagery brain computer interfaces. ISCAS 2012: 2067-2070 |
| c167 | | Tien-Ju Yang, Yi-Min Tsai, Chung-Te Li, Liang-Gee Chen: WarmL1: A warm-start homotopy-based reconstruction algorithm for sparse signals. ISIT 2012: 2226-2230 |
| c166 | | Chuan-Yung Tsai, Yu-Ju Lee, Chun-Ting Chen, Liang-Gee Chen: A 1.0TOPS/W 36-core neocortical computing processor with 2.3Tb/s Kautz NoC for universal visual recognition. ISSCC 2012: 480-482 |
| c165 | | Yi-Min Tsai, Keng-Yen Huang, H. T. Kung, Dario Vlah, Youngjune Gwon, Liang-Gee Chen: A Chip Architecture for Compressive Sensing Based Detection of IC Trojans. SiPS 2012: 61-66 |
| c164 | | Chia-Hsiang Lee, Yu-Chi Su, Liang-Gee Chen: An intelligent depth-based obstacle detection system for visually-impaired aid applications. WIAMIS 2012: 1-4 |
| 2011 | ||
| j80 | | Mohammad M. Mansour, Liang-Gee Chen, Wonyong Sung: Trends in Design and Implementation of Signal Processing Systems [In the Spotlight]. IEEE Signal Process. Mag. 28(6): 192-193 (2011) |
| j79 | | Sung-Fang Tsai, Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen: A real-time 1080p 2D-to-3D video conversion system. IEEE Trans. Consumer Electronics 57(2): 915-922 (2011) |
| j78 | | Chia-Kai Liang, Chao-Chung Cheng, Yen-Chieh Lai, Liang-Gee Chen, Homer H. Chen: Hardware-Efficient Belief Propagation. IEEE Trans. Circuits Syst. Video Techn. 21(5): 525-537 (2011) |
| j77 | | Shao-Yi Chien, Liang-Gee Chen: Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation. Signal Processing Systems 62(1): 77-96 (2011) |
| j76 | | Hong-Hui Chen, Cheng-Yi Chiang, Tung-Chien Chen, Chien-Sheng Liu, Yu-Jie Huang, Shey-Shi Lu, Chii-Wann Lin, Liang-Gee Chen: Analysis and Design of On-sensor ECG Processors for Realtime Detection of Cardiac Anomalies Including VF, VT, and PVC. Signal Processing Systems 65(2): 275-285 (2011) |
| c163 | | Wei-Kai Chan, Yu-Hsiang Tseng, Pei-Kuei Tsung, Tzu-Der Chuang, Yi-Min Tsai, Wei-Yin Chen, Liang-Gee Chen, Shao-Yi Chien: ReSSP: A 5.877 TOPS/W Reconfigurable Smart-camera Stream Processor. CICC 2011: 1-4 |
| c162 | | |
| c161 | | Hong-Hui Chen, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen: Power estimation scheme for lowpower oriented biomedical SoC extended to very deep submicron technology. ICASSP 2011: 749-752 |
| c160 | | Tung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Liang-Gee Chen: Design and implementation of cubic spline interpolation for spike sorting microsystems. ICASSP 2011: 1641-1644 |
| c159 | | Yun-Yu Chen, Yi-Min Tsai, Liang-Gee Chen: Algorithm and implementation of multi-channel spike sorting using GPU in a home-care surveillance system. ICME 2011: 1-6 |
| c158 | | Yi-Min Tsai, Chih-Chung Tsai, Keng-Yen Huang, Liang-Gee Chen: Algorithm and architecture design of a knowledge-based vehicle tracking for intelligent cruise control. ICME 2011: 1-6 |
| c157 | | Pei-Kuei Tsung, Pin-Chih Lin, Kuan-Yu Chen, Liang-Gee Chen: Six-dimensional free-viewpoint synthesis flow for QFHD free-viewpoint/multiview 3DTV applications. ICME 2011: 1-4 |
| c156 | | Tien-Ju Yang, Yi-Min Tsai, Liang-Gee Chen: Smart display: A mobile self-adaptive projector-camera system. ICME 2011: 1-6 |
| c155 | | Yu-Ju Lee, Chuan-Yung Tsai, Liang-Gee Chen: A cortex-like model for rapid object recognition using feature-selective hashing. IJCNN 2011: 996-1002 |
| c154 | | Pei-Kuei Tsung, Pin-Chih Lin, Kuan-Yu Chen, Tzu-Der Chuang, Hsin-Jung Yang, Shao-Yi Chien, Li-Fu Ding, Wei-Yin Chen, Chih-Chi Cheng, Tung-Chien Chen, Liang-Gee Chen: A 216fps 4096×2160p 3DTV set-top box SoC for free-viewpoint 3DTV applications. ISSCC 2011: 124-126 |
| c153 | | Chung-Te Li, Yen-Chieh Lai, Chien Wu, Liang-Gee Chen: Perceptual multi-cues 2D-to-3D conversion system. VCIP 2011: 1 |
| 2010 | ||
| j75 | | Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Tzu-Der Chuang, Yu-Han Chen, Pai-Heng Hsiao, Shao-Yi Chien, Liang-Gee Chen: Video encoder design for high-definition 3D video communication systems. IEEE Communications Magazine 48(4): 76-86 (2010) |
| j74 | | Jing-Ying Chang, Huei-Hung Liao, Liang-Gee Chen: Localized Detection of Abandoned Luggage. EURASIP J. Adv. Sig. Proc. 2010 (2010) |
| j73 | | Li-Fu Ding, Wei-Yin Chen, Pei-Kuei Tsung, Tzu-Der Chuang, Pai-Heng Hsiao, Yu-Han Chen, Hsu-Kuang Chiu, Shao-Yi Chien, Liang-Gee Chen: A 212 MPixels/s 4096 ˟ 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications. J. Solid-State Circuits 45(1): 46-58 (2010) |
| j72 | | Tse-Wei Chen, Chi-Sun Tang, Sung-Fang Tsai, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen: Tera-Scale Performance Machine Learning SoC (MLSoC) With Dual Stream Processor Architecture for Multimedia Content Analysis. J. Solid-State Circuits 45(11): 2321-2329 (2010) |
| j71 | | Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen: A novel 2Dd-to-3D conversion system using edge information. IEEE Trans. Consumer Electronics 56(3): 1739-1745 (2010) |
| j70 | | Wei-Min Chao, Liang-Gee Chen: Pyramid Architecture for 3840 X 2160 Quad Full High Definition 30 Frames/s Video Acquisition. IEEE Trans. Circuits Syst. Video Techn. 20(11): 1499-1508 (2010) |
| j69 | | Tzu-Der Chuang, Yu-Jen Chen, Yi-Hau Chen, Shao-Yi Chien, Liang-Gee Chen: Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension. Signal Processing Systems 60(3): 363-375 (2010) |
| c152 | | Chih-Chi Cheng, Yi-Min Tsai, Liang-Gee Chen, Anantha P. Chandrakasan: A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine. CICC 2010: 1-4 |
| c151 | | Yen-Chieh Lai, Chao-Chung Cheng, Chia-Kai Liang, Liang-Gee Chen: Efficient message reduction algorithm for stereo matching using belief propagation. ICIP 2010: 2977-2980 |
| c150 | | Keng-Yen Huang, Yi-Min Tsai, Chih-Chung Tsai, Liang-Gee Chen: Video stabilization for vehicular applications using SURF-like descriptor and KD-tree. ICIP 2010: 3517-3520 |
| c149 | | Yi-Min Tsai, Keng-Yen Huang, Chih-Chung Tsai, Liang-Gee Chen: An exploration of on-road vehicle detection using hierarchical scaling schemes. ICIP 2010: 3937-3940 |
| c148 | | Yi-Min Tsai, Keng-Yen Huang, Chih-Chung Tsai, Liang-Gee Chen: Learning-Based Vehicle Detection Using Up-Scaling Schemes and Predictive Frame Pipeline Structures. ICPR 2010: 3101-3104 |
| c147 | | Pei-Kuei Tsung, Hsin-Jung Yang, Pin-Chih Lin, Kuan-Yu Chen, Liang-Gee Chen: Hybrid color compensation for virtual view synthesis in multiview video applications. ISCAS 2010: 121-124 |
| c146 | | Yun-Yu Chen, Tung-Chien Chen, Liang-Gee Chen: Accuracy and power tradeoff in spike sorting microsystems with cubic spline interpolation. ISCAS 2010: 1508-1511 |
| c145 | | Yu-Hsin Chen, Tung-Chien Chen, Tsung-Hsueh Lee, Liang-Gee Chen: Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator. ISCAS 2010: 2083-2086 |
| c144 | | Tzu-Der Chuang, Pei-Kuei Tsung, Pin-Chih Lin, Lo-Mei Chang, Tsung-Chuan Ma, Yi-Hau Chen, Liang-Gee Chen: Low bandwidth decoder framework for H.264/AVC scalable extension. ISCAS 2010: 2960-2963 |
| c143 | | Pin-Chih Lin, Pei-Kuei Tsung, Liang-Gee Chen: Low-cost hardware architecture design for 3D warping engine in multiview video applications. ISCAS 2010: 2964-2967 |
| c142 | | Chao-Chung Cheng, Chung-Te Li, Chia-Kai Liang, Yen-Chieh Lai, Liang-Gee Chen: Architecture design of stereo matching using belief propagation. ISCAS 2010: 4109-4112 |
| c141 | | Tzu-Der Chuang, Pei-Kuei Tsung, Pin-Chih Lin, Lo-Mei Chang, Tsung-Chuan Ma, Yi-Hau Chen, Liang-Gee Chen: A 59.5mW scalable/multi-view video decoder chip for Quad/3D Full HDTV and video streaming applications. ISSCC 2010: 330-331 |
| c140 | | Tse-Wei Chen, Yi-Ling Chen, Teng-Yuan Cheng, Chi-Sun Tang, Pei-Kuei Tsung, Tzu-Der Chuang, Liang-Gee Chen, Shao-Yi Chien: A multimedia semantic analysis SoC (SASoC) with machine-learning engine. ISSCC 2010: 338-339 |
| 2009 | ||
| j68 | | Chih-Chi Cheng, Po-Chih Tseng, Liang-Gee Chen: Multimode Embedded Compression Codec Engine for Power-Aware Video Coding System. IEEE Trans. Circuits Syst. Video Techn. 19(2): 141-150 (2009) |
| j67 | | Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen: Algorithm and Architecture Design of Power-Oriented H.264/AVC Baseline Profile Encoder for Portable Devices. IEEE Trans. Circuits Syst. Video Techn. 19(8): 1118-1128 (2009) |
| c139 | | Tse-Wei Chen, Chi-Sun Tang, Sung-Fang Tsai, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen: Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis. CICC 2009: 491-494 |
| c138 | | Chia-Kai Liang, Chao-Chung Cheng, Yen-Chieh Lai, Liang-Gee Chen, Homer H. Chen: Hardware-efficient belief propagation. CVPR 2009: 80-87 |
| c137 | | Chao-Chung Cheng, Chia-Kai Liang, Yen-Chieh Lai, Homer H. Chen, Liang-Gee Chen: Fast belief propagation process element for high-quality stereo estimation. ICASSP 2009: 745-748 |
| c136 | | Tzu-Der Chuang, Lo-Mei Chang, Tsai-Wei Chiu, Yi-Hau Chen, Liang-Gee Chen: Bandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control. ICASSP 2009: 2009-2012 |
| c135 | | Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen: Cache-based integer motion/disparity estimation for quad-HD H.264/AVC and HD multiview video coding. ICASSP 2009: 2013-2016 |
| c134 | | Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Chuan-Yung Tsai, Tzu-Der Chuang, Liang-Gee Chen: Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding. ICME 2009: 9-12 |
| c133 | | Tzu-Heng Wang, Jing-Ying Chang, Liang-Gee Chen: Algorithm and architecture for object tracking using particle filter. ICME 2009: 1374-1377 |
| c132 | | Pin-Chih Lin, Tzu-Der Chuang, Liang-Gee Chen: A Branch Selection Multi-symbol High throughput CABAC Decoder Architecture for H.264/AVC. ISCAS 2009: 365-368 |
| c131 | | Tung-Chien Chen, Wentai Liu, Liang-Gee Chen: 128-channel Spike Sorting Processor with a Parallel-folding Structure in 90nm Process. ISCAS 2009: 1253-1256 |
| c130 | | Tung-Chien Chen, Kuanfu Chen, Wentai Liu, Liang-Gee Chen: On-chip Principal Component Analysis with a Mean Pre-estimation Method for Spike Sorting. ISCAS 2009: 3110-3113 |
| c129 | | Li-Fu Ding, Wei-Yin Chen, Pei-Kuei Tsung, Tzu-Der Chuang, Hsu-Kuang Chiu, Yu-Han Chen, Pai-Heng Hsiao, Shao-Yi Chien, Tung-Chien Chen, Ping-Chih Lin, Chia-Yu Chang, Liang-Gee Chen: A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/quad HDTV applications. ISSCC 2009: 154-155 |
| c128 | | |
| 2008 | ||
| j66 | | Chia-Ho Pan, Ching-Yen Chien, Wei-Min Chao, Sheng-Chieh Huang, Liang-Gee Chen: Architecture design of full HD JPEG XR encoder for digital photography applications. IEEE Trans. Consumer Electronics 54(3): 963-971 (2008) |
| j65 | | Yi-Hau Chen, Chih-Chi Cheng, Tzu-Der Chuang, Ching-Yeh Chen, Shao-Yi Chien, Liang-Gee Chen: Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine. IEEE Trans. Circuits Syst. Video Techn. 18(1): 98-109 (2008) |
| j64 | | Li-Fu Ding, Pei-Kuei Tsung, Shao-Yi Chien, Wei-Yin Chen, Liang-Gee Chen: Content-Aware Prediction Algorithm With Inter-View Mode Decision for Multiview Video Coding. IEEE Transactions on Multimedia 10(8): 1553-1564 (2008) |
| j63 | | Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen: Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder. Signal Processing Systems 50(1): 1-17 (2008) |
| j62 | | Yi-Hau Chen, Shao-Yi Chien, Ching-Yeh Chen, Yu-Wen Huang, Liang-Gee Chen: Analysis and Hardware Architecture Design of Global Motion Estimation. Signal Processing Systems 53(3): 285-300 (2008) |
| j61 | | Yi-Hau Chen, Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen: VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC. Signal Processing Systems 53(3): 335-347 (2008) |
| c127 | | Huei-Hung Liao, Jing-Ying Chang, Liang-Gee Chen: A Localized Approach to Abandoned Luggage Detection with Foreground-Mask Sampling. AVSS 2008: 132-139 |
| c126 | | Chih-Chi Cheng, Chia-Hua Lin, Chung-Te Li, Samuel C. Chang, Liang-Gee Chen: iVisual: an intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processor. DAC 2008: 90-95 |
| c125 | | Li-Fu Ding, Pei-Kuei Tsung, Wei-Yin Chen, Shao-Yi Chien, Liang-Gee Chen: Fast motion estimation with inter-view motion vector prediction for stereo and multiview video coding. ICASSP 2008: 1373-1376 |
| c124 | | Wei-Yin Chen, Li-Fu Ding, Pei-Kuei Tsung, Liang-Gee Chen: Algorithm and architecture design of cache system for motion estimation in high definition H.264/AVC. ICASSP 2008: 2193-2196 |
| c123 | | Ching-Yen Chien, Sheng-Chieh Huang, Shih-Hsiang Lin, Yu-Chieh Huang, Yi-Cheng Chen, Lei-Chun Chou, Tzu-Der Chuang, Yu-Wei Chang, Chia-Ho Pan, Liang-Gee Chen: A 100 MHz 1920×1080 HD-Photo 20 frames/sec JPEG XR encoder design. ICIP 2008: 1384-1387 |
| c122 | | Yu-Lin Chang, Yi-Min Tsai, Liang-Gee Chen: A real-time augmented view synthesis system for transparent car pillars. ICIP 2008: 1972-1975 |
| c121 | | Chia-Ho Pan, Sheng-Chieh Huang, I-Hsien Lee, Chung-Jr Lian, Liang-Gee Chen: Scalable video adaptation optimization using soft decision scheme. ICME 2008: 469-472 |
| c120 | | Wei-Yin Chen, Li-Fu Ding, Pei-Kuei Tsung, Liang-Gee Chen: Architecture design of high performance embedded compression for high definition video coding. ICME 2008: 825-828 |
| c119 | | Pei-Kuei Tsung, Chun-Yi Lin, Wei-Yin Chen, Li-Fu Ding, Liang-Gee Chen: Multiview video hybrid coding system with texture-depth synthesis. ICME 2008: 1581-1584 |
| c118 | | Yi-Hau Chen, Tzu-Der Chuang, Yu-Han Chen, Chen-Han Tsai, Liang-Gee Chen: Frame-parallel design strategy for high definition B-frame H.264/AVC encoder. ISCAS 2008: 29-32 |
| c117 | | You-Ming Tsao, Ka-Hang Lok, Yu-Cheng Lin, Chih-Hao Sun, Shao-Yi Chien, Liang-Gee Chen: A cost effective reconfigurable memory for multimedia multithreading streaming architecture. ISCAS 2008: 3406-3409 |
| c116 | | Jing-Ying Chang, Tzu-Heng Wang, Shao-Yi Chien, Liang-Gee Chen: Spatial-temporal consistent labeling for multi-camera multi-object surveillance systems. ISCAS 2008: 3530-3533 |
| c115 | | Chen Han Chung, Yu-Chieh Kao, Liang-Gee Chen, Fu-Shan Jaw: Intelligent Content-Aware Model-Free Low Power Evoked Neural Signal Compression. PCM 2008: 898-901 |
| c114 | | Chao-Chung Cheng, Chia-Kai Liang, Yen-Chieh Lai, Homer H. Chen, Liang-Gee Chen: Analysis of belief propagation for hardware realization. SiPS 2008: 152-157 |
| c113 | | Chi-Wei Lin, Yu-Han Chen, Liang-Gee Chen: Bio-inspired unified model of visual segmentation system for CAPTCHA character recognition. SiPS 2008: 158-163 |
| 2007 | ||
| j60 | | Chia-Ho Pan, I-Hsien Lee, Sheng-Chieh Huang, Chung-Jr Lian, Liang-Gee Chen: A Quality-of-Experience Video Adaptor for Serving Scalable Video Applications. IEEE Trans. Consumer Electronics 53(3): 1130-1137 (2007) |
| j59 | | Tung-Chien Chen, Chuan-Yung Tsai, Yu-Wen Huang, Liang-Gee Chen: Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC. IEEE Trans. Circuits Syst. Video Techn. 17(2): 242-247 (2007) |
| j58 | | Yu-Wei Chang, Chih-Chi Cheng, Chun-Chia Chen, Hung-Chi Fang, Liang-Gee Chen: 124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec Without Tile Memory. IEEE Trans. Circuits Syst. Video Techn. 17(4): 398-406 (2007) |
| j57 | | Tung-Chien Chen, Yu-Han Chen, Sung-Fang Tsai, Shao-Yi Chien, Liang-Gee Chen: Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC. IEEE Trans. Circuits Syst. Video Techn. 17(5): 568-577 (2007) |
| j56 | | Chih-Chi Cheng, Chao-Tsung Huang, Ching-Yeh Chen, Chung-Jr Lian, Liang-Gee Chen: On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Techn. 17(7): 814-822 (2007) |
| j55 | | Yu-Wei Chang, Hung-Chi Fang, Chun-Chia Chen, Chung-Jr Lian, Liang-Gee Chen: Word-Level Parallel Architecture of JPEG 2000 Embedded Block Coding Decoder. IEEE Transactions on Multimedia 9(6): 1103-1112 (2007) |
| c112 | | Shao-Yi Chien, Chi-Sheng Shih, Mong-Kai Ku, Chia-Lin Yang, Yao-Wen Chang, Tei-Wei Kuo, Liang-Gee Chen: 3D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design. ICME 2007: 9 |
| c111 | | Yu-Lin Chang, Chih-Ying Fang, Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen: Depth Map Generation for 2D-to-3D Conversion by Short-Term Motion Assisted Color Segmentation. ICME 2007: 1958-1961 |
| c110 | | Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi Chien, Tung-Chien Chen, Liang-Gee Chen: System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint. ISCAS 2007: 1001-1004 |
| c109 | | Yu-Jen Chen, Yi-Hau Chen, Tzu-Der Chuang, Chung-Te Li, Shao-Yi Chien, Liang-Gee Chen: Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension. SiPS 2007: 515-520 |
| c108 | | Chung-Jr Lian, Po-Chih Tseng, Tung-Chien Chen, Yu-Wei Chang, Liang-Gee Chen: Reconfigurable architecture for video applications. SoCC 2007: 21-24 |
| 2006 | ||
| j54 | | Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen: Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC. IEEE Trans. Circuits Syst. Video Techn. 16(4): 507-522 (2006) |
| j53 | | Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Liang-Gee Chen: Level C+ data reuse scheme for motion estimation with corresponding coding orders. IEEE Trans. Circuits Syst. Video Techn. 16(4): 553-558 (2006) |
| j52 | | Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen: Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder. IEEE Trans. Circuits Syst. Video Techn. 16(6): 673-688 (2006) |
| j51 | | Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen: Joint Prediction Algorithm and Architecture for Stereo Video Hybrid Coding Systems. IEEE Trans. Circuits Syst. Video Techn. 16(11): 1324-1337 (2006) |
| j50 | | Yu-Wei Chang, Hung-Chi Fang, Chih-Chi Cheng, Chun-Chia Chen, Liang-Gee Chen: Precompression Quality-Control Algorithm for JPEG 2000. IEEE Transactions on Image Processing 15(11): 3279-3293 (2006) |
| j49 | | Hung-Chi Fang, Yu-Wei Chang, Tu-Chih Wang, Chao-Tsung Huang, Liang-Gee Chen: High-Performance JPEG 2000 Encoder With Rate-Distortion Optimization. IEEE Transactions on Multimedia 8(4): 645-653 (2006) |
| j48 | | Yung-Chi Chang, Wei-Min Chao, Chih-Wei Hsu, Liang-Gee Chen: Platform-Based MPEG-4 SOC Design for Video Communications. VLSI Signal Processing 42(1): 7-19 (2006) |
| j47 | | Shao-Yi Chien, Bing-Yu Hsieh, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen: Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems. VLSI Signal Processing 42(3): 241-255 (2006) |
| j46 | | Yu-Wen Huang, Ching-Yeh Chen, Chen-Han Tsai, Chun-Fu Shen, Liang-Gee Chen: Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results. VLSI Signal Processing 42(3): 297-320 (2006) |
| j45 | | Yung-Chi Chang, Chih-Wei Hsu, Wei-Min Chao, Liang-Gee Chen: Interactive Content-aware Video Streaming System with Fine Granularity Scalability. VLSI Signal Processing 44(1-2): 117-134 (2006) |
| c107 | | Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen: Hardware architecture design of an H.264/AVC video codec. ASP-DAC 2006: 750-757 |
| c106 | | |
| c105 | | Jing-Ying Chang, Chao-Chung Cheng, Shao-Yi Chien, Liang-Gee Chen: Relative Depth Layer Extraction for Monoscopic Video by Use of Multidimensional Filter. ICME 2006: 221-224 |
| c104 | | Yu-Han Chen, Tung-Chien Chen, Liang-Gee Chen: Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile Application. ICME 2006: 281-284 |
| c103 | | Yi-Hau Chen, Ching-Yeh Chen, Chih-Chi Cheng, Liang-Gee Chen: Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME. ICME 2006: 365-368 |
| c102 | | Chuan-Yung Tsai, Tung-Chien Chen, Liang-Gee Chen: Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder. ICME 2006: 1941-1944 |
| c101 | | Wan-Yu Chen, Yu-Lin Chang, Hsu-Kuang Chiu, Shao-Yi Chien, Liang-Gee Chen: Real-Time Depth Image based Rendering Hardware Accelerator for Advanced Three Dimensional Television System. ICME 2006: 2069-2072 |
| c100 | | Ching-Yeh Chen, Yi-Hau Chen, Chih-Chi Cheng, Liang-Gee Chen: Frame-level data reuse for motion-compensated temporal filtering. ISCAS 2006 |
| c99 | | Chun-Chia Chen, Yu-Wei Chang, Hung-Chi Fang, Liang-Gee Chen: Analysis of scalable architecture for the embedded block coding in JPEG 2000. ISCAS 2006 |
| c98 | | Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen: Low power and power aware fractional motion estimation of H.264/AVC for mobile applications. ISCAS 2006 |
| c97 | | Yu-Jen Chen, Chen-Han Tsai, Liang-Gee Chen: Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC. ISCAS 2006 |
| c96 | | Chih-Chi Cheng, Ching-Yeh Chen, Yi-Hau Chen, Liang-Gee Chen: Analysis and VLSI architecture of update step in motion-compensated temporal filtering. ISCAS 2006 |
| c95 | | Chi-Sun Tang, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen: Algorithm and hardware architecture design for weighted prediction in H.264/MPEG-4 AVC. ISCAS 2006 |
| c94 | | You-Ming Tsao, Chi-Ling Wu, Shao-Yi Chien, Liang-Gee Chen: Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems. ISCAS 2006 |
| c93 | | Yu-Wei Chang, Chih-Chi Cheng, Chun-Chia Chen, Hung-Chi Fang, Liang-Gee Chen: Design and Implementation of JPEG 2000 Codec with Bit-Plane Scalable Architecture. SiPS 2006: 428-433 |
| 2005 | ||
| j44 | | Pei-Jun Lee, Homer H. Chen, Wen-June Wang, Liang-Gee Chen: Feature-Based Error Concealment for Object-Based Video. IEICE Transactions 88-B(6): 2616-2626 (2005) |
| j43 | | Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen: Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder. IEEE Trans. Circuits Syst. Video Techn. 15(3): 378-401 (2005) |
| j42 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method. IEEE Trans. Circuits Syst. Video Techn. 15(7): 910-920 (2005) |
| j41 | | Hung-Chi Fang, Yu-Wei Chang, Tu-Chih Wang, Chung-Jr Lian, Liang-Gee Chen: Parallel embedded block coding architecture for JPEG 2000. IEEE Trans. Circuits Syst. Video Techn. 15(9): 1086-1097 (2005) |
| j40 | | Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen: Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements. IEEE Trans. Circuits Syst. Video Techn. 15(9): 1156-1169 (2005) |
| j39 | | Yu-Lin Chang, Shyh-Feng Lin, Ching-Yeh Chen, Liang-Gee Chen: Video de-interlacing by adaptive 4-field global/local motion compensated approach. IEEE Trans. Circuits Syst. Video Techn. 15(12): 1569-1582 (2005) |
| j38 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform. IEEE Transactions on Signal Processing 53(4): 1575-1586 (2005) |
| j37 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters. VLSI Signal Processing 40(2): 175-188 (2005) |
| j36 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization. VLSI Signal Processing 40(3): 343-353 (2005) |
| j35 | | Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen: Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems. VLSI Signal Processing 41(1): 35-47 (2005) |
| j34 | | Yung-Chi Chang, Chao-Chih Huang, Wei-Min Chao, Liang-Gee Chen: An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System. VLSI Signal Processing 41(2): 183-191 (2005) |
| c92 | | Chung-Jr Lian, Yu-Wen Huang, Hung-Chi Fang, Yung-Chi Chang, Liang-Gee Chen: PEG, MPEG-4, and H.264 Codec IP Development. DATE 2005: 1118-1119 |
| c91 | | Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Chung-Jr Lian, Liang-Gee Chen: System analysis of VLSI architecture for motion-compensated temporal filtering. ICIP (3) 2005: 992-995 |
| c90 | | Chia-Ping Lin, Po-Chih Tseng, Liang-Gee Chen: Nearly Lossless Content-Dependent Low-Power DCT Design for Mobile Video Applications. ICME 2005: 1238-1241 |
| c89 | | Wan-Yu Chen, Yu-Lin Chang, Shyh-Feng Lin, Li-Fu Ding, Liang-Gee Chen: Efficient Depth Image Based Rendering with Edge Dependent Depth Filter and Interpolation. ICME 2005: 1314-1317 |
| c88 | | Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Chao-Tsung Huang, Liang-Gee Chen: Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC. ISCAS (2) 2005: 1790-1793 |
| c87 | | Yi-Hau Chen, Ching-Yeh Chen, Liang-Gee Chen: Architecture of global motion compensation for MPEG-4 advanced simple profile. ISCAS (5) 2005: 1798-1801 |
| c86 | | To-Wei Chen, Yu-Wen Huang, Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen: Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos. ISCAS (3) 2005: 2931-2934 |
| c85 | | Shih-Way Huang, Liang-Gee Chen, Tsung-Han Tsai: Memory and computationally efficient psychoacoustic model for MPEG AAC on 16-bit fixed-point processors. ISCAS (4) 2005: 3155-3158 |
| c84 | | Chih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, Liang-Gee Chen: Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT. ISCAS (5) 2005: 5190-5193 |
| c83 | | Yu-Wen Huang, Chia-Lin Lee, Ching-Yeh Chen, Liang-Gee Chen: One-pass computation-aware motion estimation with adaptive search strategy. ISCAS (6) 2005: 5469-5472 |
| c82 | | Li-Fu Ding, Shao-Yi Chien, Yu-Wen Huang, Yu-Lin Chang, Liang-Gee Chen: Stereo video coding system with hybrid coding based on joint prediction scheme. ISCAS (6) 2005: 6082-6085 |
| c81 | | Chia-Ho Pan, I-Hsien Lee, Sheng-Chieh Huang, Chih-Chi Cheng, Chung-Jr Lian, Liang-Gee Chen: Application Layer Error Correction Scheme for Video Header Protection on Wireless Network. ISM 2005: 499-505 |
| c80 | | Chi-Sheng Shih, Chia-Lin Yang, Mong-Kai Ku, Tei-Wei Kuo, Shao-Yi Chien, Yao-Wen Chang, Liang-Gee Chen: Reconfigurable Platform for Content Science Research. RTCSA 2005: 481-486 |
| 2004 | ||
| j33 | | Shih-Way Huang, Tsung-Han Tsai, Liang-Gee Chen: A low complexity design of psycho-acoustic model for MPEG-2/4 advanced audio coding. IEEE Trans. Consumer Electronics 50(4): 1209-1217 (2004) |
| j32 | | Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen: Global elimination algorithm and architecture design for fast block matching motion estimation. IEEE Trans. Circuits Syst. Video Techn. 14(6): 898-907 (2004) |
| j31 | | Shao-Yi Chien, Yu-Wen Huang, Bing-Yu Hsieh, Shyh-Yih Ma, Liang-Gee Chen: Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques. IEEE Transactions on Multimedia 6(5): 732-748 (2004) |
| j30 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform. IEEE Transactions on Signal Processing 52(4): 1080-1089 (2004) |
| c79 |  | Jing-Kng Chang, Hung-Chi Fang, Yen-Wei Huang, Liang-Gee Chen: Architecture of MPEG-7 color structure description generator for realtime video applications. ICIP 2004: 2813-2816 |
| c78 | | Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen: Hardware architecture design for H.264/AVC intra frame coder. ISCAS (2) 2004: 269-272 |
| c77 | | Tung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen: Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture. ISCAS (2) 2004: 273-276 |
| c76 | | Ching-Yeh Chen, Shao-Yi Chien, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen: Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile. ISCAS (2) 2004: 301-304 |
| c75 | | Siou-Shen Lin, Po-Chih Tseng, Liang-Gee Chen: Low-power parallel tree architecture for full search block-matching motion estimation. ISCAS (2) 2004: 313-316 |
| c74 | | Yu-Lin Chang, Shyh-Feng Lin, Liang-Gee Chen: Extended intelligent edge-based line average with its implementation and test method. ISCAS (2) 2004: 341-344 |
| c73 | | Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen: Reconfigurable discrete cosine transform processor for object-based video signal processing. ISCAS (2) 2004: 353-356 |
| c72 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: B-spline factorization-based architecture for inverse discrete wavelet transform. ISCAS (2) 2004: 829-832 |
| c71 | | Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen: MPEG-4 FGS Encoder Design for an Interactive Content-aware MPEG-4 Video Streaming SOC. IWSOC 2004: 172-175 |
| c70 | | Jing-Ying Chang, Chung-Jr Lian, Hung-Chi Fang, Liang-Gee Chen: Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval. PCM (2) 2004: 130-137 |
| 2003 | ||
| j29 | | Yu-Wen Huang, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen: Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors. IEEE Trans. Circuits Syst. Video Techn. 13(1): 111-117 (2003) |
| j28 | | Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen, Liang-Gee Chen: Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000. IEEE Trans. Circuits Syst. Video Techn. 13(3): 219-230 (2003) |
| j27 | | Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen: Predictive watershed: a fast watershed algorithm for video segmentation. IEEE Trans. Circuits Syst. Video Techn. 13(5): 453-461 (2003) |
| c69 | | Wei-Min Chao, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen: Platform architecture design for MEG-4 video coding. ICIP (3) 2003: 93-96 |
| c68 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9, 7) filter bank. ICIP (2) 2003: 571-574 |
| c67 | | Yu-Lin Chang, Ching-Yeh Chen, Shyh-Feng Lin, Liang-Gee Chen: Motion compensated de-interlacing with adaptive global motion estimation and compensation. ICIP (3) 2003: 693-696 |
| c66 | | Shao-Yi Chien, Shu-Han Yu, Li-Fu Ding, Yun-Nien Huang, Liang-Gee Chen: Efficient stereo video coding system for immersive teleconference with two-stage hybrid disparity estimation algorithm. ICIP (1) 2003: 749-752 |
| c65 | | Hung-Chi Fang, Tu-Chih Wang, Yu-Wei Chang, Ya-Yun Shih, Liang-Gee Chen: Novel word-level algorithm of embedded block coding in JPEG 2000. ICME 2003: 137-140 |
| c64 | | Ching-Yeh Chen, Shao-Yi Chien, Yi-Hau Chen, Yu-Wen Huang, Liang-Gee Chen: Unsupervised object-based sprite coding system for tennis sport. ICME 2003: 337-340 |
| c63 | | Hung-Chi Fang, Tu-Chih Wang, Yu-Wei Chang, Liang-Gee Chen: Hardware oriented rate control algorithm and implementation for realtime video coding. ICME 2003: 421-424 |
| c62 | | Tu-Chih Wang, Yu-Wen Huang, Hung-Chi Fang, Liang-Gee Chen: Performance analysis of hardware oriented algorithm modification in H.264. ICME 2003: 601-604 |
| c61 | | Yu-Wen Huang, To-Wei Chen, Bing-Yu Hsieh, Tu-Chih Wang, Te-Hao Chang, Liang-Gee Chen: Architecture design for deblocking filter in H.264/JVT/AVC. ICME 2003: 693-696 |
| c60 | | Yu-Wen Huang, Bing-Yu Hsieh, Tu-Chih Wang, Shao-Yi Chen, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen: Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. ICME 2003: 809-812 |
| c59 | | Tsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen: Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder. ISCAS (2) 2003: 552-555 |
| c58 | | Te-Hao Chang, Chung-Jr Lian, Hong-Hui Chen, Jing-Ying Chang, Liang-Gee Chen: Effective hardware-oriented technique for the rate control of JPEG2000 encoding. ISCAS (2) 2003: 684-687 |
| c57 | | Shyh-Feng Lin, Yu-Lin Chang, Liang-Gee Chen: Motion adaptive de-interlacing by horizontal motion detection and enhanced ELA processing. ISCAS (2) 2003: 696-699 |
| c56 | | Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen: Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile. ISCAS (2) 2003: 720-723 |
| c55 | | Hung-Chi Fang, Tu-Chih Wang, Chung-Jr Lian, Te-Hao Chang, Liang-Gee Chen: High speed memory efficient EBCOT architecture for JPEG2000. ISCAS (2) 2003: 736-739 |
| c54 | | Chih-Wei Hsu, Yung-Chi Chang, Wei-Min Chao, Liang-Gee Chen: Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder. ISCAS (2) 2003: 784-787 |
| c53 | | Wei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen: Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile. ISCAS (2) 2003: 788-791 |
| c52 | | Yu-Wen Huang, Tu-Chih Wang, Bing-Yu Hsieh, Liang-Gee Chen: Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264. ISCAS (2) 2003: 796-799 |
| c51 | | Tu-Chih Wang, Yu-Wen Huang, Hung-Chi Fang, Liang-Gee Chen: Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264. ISCAS (2) 2003: 800-803 |
| c50 | | Shao-Yi Chien, Shu-Han Yu, Li-Fu Ding, Yun-Nien Huang, Liang-Gee Chen: Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach. VCIP 2003: 1521-1530 |
| c49 | | Bing-Yu Hsieh, Yu-Wen Huang, Tu-Chih Wang, Shao-Yi Chien, Liang-Gee Chen: Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria. VCIP 2003: 1551-1560 |
| 2002 | ||
| j26 | | Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen: Efficient moving object segmentation algorithm using background registration technique. IEEE Trans. Circuits Syst. Video Techn. 12(7): 577-586 (2002) |
| j25 | | Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-Ming Chao, Liang-Gee Chen: VLSI architecture design of MPEG-4 shape coding. IEEE Trans. Circuits Syst. Video Techn. 12(9): 741-751 (2002) |
| j24 | | Tu-Chih Wang, Hung-Chi Fang, Liang-Gee Chen: Low-delay and error-robust wireless video transmission for video communications. IEEE Trans. Circuits Syst. Video Techn. 12(12): 1049-1058 (2002) |
| c48 | | Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen: Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method. APCCAS (1) 2002: 363-366 |
| c47 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform. APCCAS (1) 2002: 383-388 |
| c46 | | Pei-Jun Lee, Liang-Gee Chen: Error recovery for MPEG-4 shape and texture information. APCCAS (1) 2002: 525-528 |
| c45 | | Hung-Chi Fang, Tu-Chih Wang, Liang-Gee Chen: Real-time deblocking filter for MPEG-4 systems. APCCAS (1) 2002: 541-544 |
| c44 | | Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen: An efficient and low power architecture design for motion estimation using global elimination algorithm. ICASSP 2002: 3120-3123 |
| c43 | | Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen: Predictive watershed for image sequences segmentation. ICASSP 2002: 3196-3199 |
| c42 | | Te-Hao Chang, Li-Lin Chen, Chung-Jr Lian, Hong-Hui Chen, Liang-Gee Chen: Computation reduction technique for lossy JPEG2000 encoding through EBCOT Tier-2 feedback processing. ICIP (3) 2002: 85-88 |
| c41 | | Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Chih-Wei Hsu, Yu-Wen Huang, Liang-Gee Chen: A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques. ICIP (1) 2002: 193-196 |
| c40 | | Pei-Jun Lee, Liang-Gee Chen: Bit-plane error recovery via cross subband for image transmission in JPEG2000. ICME (1) 2002: 149-152 |
| c39 | | Tu-Chih Wang, Hung-Chi Fang, Liang-Gee Chen: Low delay, error robust wireless video transmission architecture for video communication. ICME (1) 2002: 265-268 |
| c38 | | Shao-Yi Chien, Ching-Yeh Chen, Yu-Wen Huang, Liang-Gee Chen: Multiple sprites and frame skipping techniques for sprite generation with high subjective quality and fast speed. ICME (1) 2002: 785-788 |
| c37 | | Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Liang-Gee Chen: Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera. ICME (1) 2002: 789-792 |
| c36 | | Hong-Hui Chen, Chung-Jr Lian, Te-Hao Chang, Liang-Gee Chen: Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000. ISCAS (4) 2002: 329-332 |
| c35 | | Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen: A hardware accelerator for video segmentation using programmable morphology PE array. ISCAS (4) 2002: 341-344 |
| c34 | | Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen: Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method. ISCAS (5) 2002: 565-568 |
| c33 | | Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen: Automatic threshold decision of background registration technique for video segmentation. VCIP 2002: 552-563 |
| c32 | | Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen: VLSI implementation of shape-adaptive discrete wavelet transform. VCIP 2002: 655-666 |
| 2001 | ||
| j23 | | Po-Cheng Wu, Liang-Gee Chen: An efficient architecture for two-dimensional discrete wavelet transform. IEEE Trans. Circuits Syst. Video Techn. 11(4): 536-545 (2001) |
| j22 | | Jun-Fu Shen, Tu-Chih Wang, Liang-Gee Chen: A novel low-power full-search block-matching motion-estimation design for H.263+. IEEE Trans. Circuits Syst. Video Techn. 11(7): 890-897 (2001) |
| j21 | | Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen: A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform. VLSI Signal Processing 28(3): 151-163 (2001) |
| j20 | | Liang-Gee Chen, Hsueh-Ming Hang, Ichiro Kuroda: Guest Editors' Introduction. VLSI Signal Processing 29(3): 155-156 (2001) |
| j19 | | Tsung-Han Tsai, Ren-Jr Wu, Liang-Gee Chen: A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core. VLSI Signal Processing 29(3): 255-265 (2001) |
| c31 | | Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yung-Chi Chang: Design and implementation of JPEG encoder IP core. ASP-DAC 2001: 29-30 |
| c30 | | Yung-Chi Chang, Chao-Chih Huang, Hao-Chieh Chang, Hung-Chi Fang, Liang-Gee Chen: Error-Propagation Analysis and Concealment Strategy for MPEG-4 Video Bitstream with Data Partitioning. ICME 2001 |
| c29 | | Liang-Gee Chen, Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen: Analysis and Architecture Design of JPEG2000. ICME 2001 |
| c28 | | Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen: Automatic Video Segmentation For MPEG-4 Using Predictivewatershed. ICME 2001 |
| c27 | | Hao-Chieh Chang, Zhong-Lan Yang, Chung-Jr Lian, Liang-Gee Chen: Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding. ISCAS (2) 2001: 193-196 |
| c26 | | Mei-Yun Hsu, Hao-Chieh Chang, Yi-Chu Wang, Liang-Gee Chen: Scalable module-based architecture for MPEG-4 BMA motion estimation. ISCAS (2) 2001: 245-248 |
| c25 | | Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen: A hybrid morphology processing units architecture for real-time video segmentation systems. ISCAS (5) 2001: 275-278 |
| c24 | | Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen, Liang-Gee Chen: Lifting based discrete wavelet transform architecture for JPEG2000. ISCAS (2) 2001: 445-448 |
| c23 | | Kuanfu Chen, Chung-Jr Lian, Hong-Hui Chen, Liang-Gee Chen: Analysis and architecture design of EBCOT for JPEG-2000. ISCAS (2) 2001: 765-768 |
| c22 | | Yi-Chu Wang, Hao-Chieh Chang, Wei-Ming Chao, Liang-Gee Chen: Efficient architecture of binary motion estimation for MPEG-4 shape coding. VCIP 2001: 959-967 |
| 2000 | ||
| j18 | | Hao-Chieh Chang, Jiun-Ying Jiu, Li-Lin Chen, Liang-Gee Chen: A Low Power 8 x 8 Direct 2-D DCT Chip Design. VLSI Signal Processing 26(3): 319-332 (2000) |
| c21 | | Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen: Efficient video segmentation algorithm for real-time MPEG-4 camera system. VCIP 2000: 1087-1098 |
| 1999 | ||
| c20 | | Sheng-Chieh Huang, Liang-Gee Chen, Hao-Chieh Chang: A novel image compression algorithm by using Log-Exp transform. ISCAS (4) 1999: 17-20 |
| c19 | | Jun-Fu Shen, Liang-Gee Chen, Hao-Chieh Chang, Tu-Chih Wang: Low power full-search block-matching motion estimation chip for H.263+. ISCAS (4) 1999: 299-302 |
| c18 | | Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang: A VLSI architecture design of VLC encoder for high data rate video/image coding. ISCAS (4) 1999: 398-401 |
| c17 | | Tsung-Han Tsai, Liang-Gee Chen: A cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding. ISCAS (3) 1999: 548-551 |
| 1998 | ||
| j17 | | Yeong-Kang Lai, Liang-Gee Chen: A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm. IEEE Trans. Circuits Syst. Video Techn. 8(2): 124-127 (1998) |
| c16 | | Liang-Gee Chen, Juing-Ying Jiu, Hao-Chieh Chang, Yung-Pin Lee, Chung-Wei Ku: A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm. ASP-DAC 1998: 145-150 |
| 1997 | ||
| j16 | | Yung-Pin Lee, Thou-Ho Chen, Liang-Gee Chen, Mei-Juan Chen, Chung-Wei Ku: A cost-effective architecture for 8×8 two-dimensional DCT/IDCT using direct method. IEEE Trans. Circuits Syst. Video Techn. 7(3): 459-467 (1997) |
| j15 | | Mei-Juan Chen, Liang-Gee Chen, Ro-Min Weng: Error concealment of lost motion vectors with overlapped motion compensation. IEEE Trans. Circuits Syst. Video Techn. 7(3): 560-563 (1997) |
| j14 | | Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao: A bit-level pipelined VLSI architecture for the running order algorithm. IEEE Transactions on Signal Processing 45(8): 2140-2144 (1997) |
| j13 | | Yee-Wen Chen, Liang-Gee Chen, Mei-Juan Chen: Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding. VLSI Signal Processing 17(2-3): 189-200 (1997) |
| c15 | | Yeong-Kang Lai, Liang-Gee Chen, Yung-Pin Lee: A flexible data-interlacing architecture for full-search block-matching algorithm. ASAP 1997: 96- |
| c14 | | Mei-Juan Chen, Liang-Gee Chen, Ruei-Xi Chen: Error Resilience for Block Loss with Overlapped Motion Compensation. ICIP (2) 1997: 105-108 |
| 1996 | ||
| j12 | | Po-Cheng Wu, Liang-Gee Chen, Tzi-Dar Chiueh: Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks. IEEE Trans. Circuits Syst. Video Techn. 6(4): 407-410 (1996) |
| j11 | | Sheng-Chieh Huang, Liang-Gee Chen, Thou-Ho Chen: A 32-bit logarithmic number system processor. VLSI Signal Processing 14(3): 311-319 (1996) |
| c13 | | Chun-Te Chen, Liang-Gee Chen: A self-adjusting weighted median filter for removing impulse noise in images. ICIP (1) 1996: 419-422 |
| c12 | | Po-Cheng Wu, Liang-Gee Chen, Yeong-Kang Lai, Tsung-Han Tsai: Design strategy for three-dimensional subband filter banks. ICIP (1) 1996: 605-608 |
| c11 | | Chung-Wei Ku, Liang-Gee Chen, You-Ming Chiu, Yung-Pin Lee: A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation. ICIP (1) 1996: 653-656 |
| 1995 | ||
| j10 | | Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen: High throughput CORDIC-based systolic array design for the discrete cosine transform. IEEE Trans. Circuits Syst. Video Techn. 5(3): 218-225 (1995) |
| j9 | | Mei-Juan Chen, Liang-Gee Chen, Tzi-Dar Chiueh, Yung-Pin Lee: A new block-matching criterion for motion estimation and its implementation. IEEE Trans. Circuits Syst. Video Techn. 5(3): 231-236 (1995) |
| j8 | | Liang-Gee Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh: Pipeline interleaving design for FIR, IIR, and FFT array processors. VLSI Signal Processing 10(3): 275-293 (1995) |
| c10 | | Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao: A hardware-oriented design for weighted median filters. ASP-DAC 1995 |
| 1994 | ||
| j7 | | Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh: Accuracy improvement and cost reduction of 3-step search block matching algorithm for video coding. IEEE Trans. Circuits Syst. Video Techn. 4(1): 88-90 (1994) |
| j6 | | Liang-Gee Chen, Yuan-Chen Liu: A high quality MC-OBTC Codec for video signal processing. IEEE Trans. Circuits Syst. Video Techn. 4(1): 92-98 (1994) |
| j5 | | Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh: Parallel architectures for 3-step hierarchical search block-matching algorithm. IEEE Trans. Circuits Syst. Video Techn. 4(4): 407-416 (1994) |
| j4 | | Mei-Juan Chen, Liang-Gee Chen, Tzi-Dar Chiueh: One-dimensional full search motion estimation algorithm for video coding. IEEE Trans. Circuits Syst. Video Techn. 4(5): 504-509 (1994) |
| j3 | | Lih-Gwo Jeng, Liang-Gee Chen: Rate-optimal DSP synthesis by pipeline and minimum unfolding. IEEE Trans. VLSI Syst. 2(1): 81-88 (1994) |
| c9 | | Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen: High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform. ISCAS 1994: 85-88 |
| c8 | | Chung-Wei Ku, Liang-Gee Chen, Tzi-Dar Chiueh, Her-Ming Jong: Tree-Structure Architecture and VLSI Implementation for Vector Quantization Algorithms. ISCAS 1994: 139-142 |
| c7 | | Sheng-Chieh Huang, Liang-Gee Chen, Thou-Ho Chen: The Chip Design of A 32-b Logarithmic Number System. ISCAS 1994: 167-170 |
| c6 | | Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh: Parallel Architectures of 3-Step Search Block-Matching Algorithm for Video Coding. ISCAS 1994: 209-212 |
| 1993 | ||
| j2 | | Yeu-Shen Jehng, Liang-Gee Chen, Tzi-Dar Chiueh: An efficient and simple VLSI tree architecture for motion estimation algorithms. IEEE Transactions on Signal Processing 41(2): 889-900 (1993) |
| c5 | | Pinhong Chen, Jyuo-Min Shyu, Liang-Gee Chen: Hardware Verification Using Symbolic State Transition Graphs. ICCD 1993: 54-57 |
| c4 | | Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen: Novel Systolic Array Design for the Discrete Hartley Transform with High Throughput Rate. ISCAS 1993: 1567-1570 |
| c3 | | Lih-Gwo Jeng, Liang-Gee Chen: Rate-Optimal DSP Synthesis by Pipeline and Minimum Undolding. VLSI Design 1993: 148-153 |
| 1992 | ||
| c2 | | Thou-Ho Chen, Liang-Gee Chen, Yi-Shing Chang: Design of Concurrent Error-Detectable VLSI-Based Array Dividers. ICCD 1992: 72-75 |
| 1991 | ||
| j1 | | Liang-Gee Chen, Wai-Ting Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh: An efficient parallel motion estimation algorithm for digital image processing. IEEE Trans. Circuits Syst. Video Techn. 1(4): 378-385 (1991) |
| c1 | | Liang-Gee Chen, Wai-Ting Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh: A Predictive Parallel Motion Estimation Algorithm for Digital Image Processing. ICCD 1991: 617-620 |
Colors in the list of coauthors
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