David Ihsin Cheng Coauthor index pubzone.org

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j3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Yu-Liang Wu, Chak-Chung Cheung, David Ihsin Cheng, Hongbing Fan: Further improve circuit partitioning using GBAW logic perturbation techniques. IEEE Trans. VLSI Syst. 11(3): 451-460 (2003)
2001
c10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Chak-Chung Cheung, Yu-Liang Wu, David Ihsin Cheng: Further improve circuit partitioning using GBAW logic perturbation techniques. DATE 2001: 233-239
2000
c9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Yu-Liang Wu, Xiao-Long Yuan, David Ihsin Cheng: Circuit partitioning with coupled logic restructuring techniques. ASP-DAC 2000: 655-660
1999
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shih-Chieh Chang, David Ihsin Cheng: Efficient Boolean division and substitution using redundancy addition and removing. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1096-1106 (1999)
1998
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska: A hybrid methodology for switching activities estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 357-366 (1998)
c8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shih-Chieh Chang, David Ihsin Cheng: Efficient Boolean Division and Substitution. DAC 1998: 342-347
c7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
David Ihsin Cheng: On Removing Multiple Redundancies in Combinational Circuits. DATE 1998: 738-742
1997
c6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, David Ihsin Cheng: Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis. ITC 1997: 974-981
1996
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska: A New Hybrid Methodology for Power Estimation. DAC 1996: 439-444
1995
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Chih-Chang Lin, David Ihsin Cheng, Malgorzata Marek-Sadowska, Kuang-Chien Chen: Logic rectification and synthesis for engineering change. ASP-DAC 1995
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
David Ihsin Cheng, Chih-Chang Lin, Malgorzata Marek-Sadowska: Circuit partitioning with logic perturbation. ICCAD 1995: 650-655
1994
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srinivasan, David P. LaPotin: Error Diagnosis for Transistor-Level Verification. DAC 1994: 218-224
c1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shih-Chieh Chang, David Ihsin Cheng, Malgorzata Marek-Sadowska: Minimizing ROBDD Size of Incompletely Specified Multiple Output Functions. EDAC-ETC-EUROASIC 1994: 620-624

Coauthor Index

1Shih-Chieh Chang
[j2] [c8] [c1]
2Kuang-Chien Chen
[c6] [c4]
3Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng)
[j1] [c6] [c5]
4Chak-Chung Cheung
[j3] [c10]
5Hongbing Fan
[j3]
6Shi-Yu Huang
[c6]
7Andreas Kuehlmann
[c2]
8David P. LaPotin
[c2]
9Chih-Chang Lin
[c4] [c3]
10Malgorzata Marek-Sadowska
[j1] [c5] [c4] [c3] [c1]
11Arvind Srinivasan
[c2]
12Deborah C. Wang
[j1] [c5]
13Yu-Liang Wu (David Yu-Liang Wu)
[j3] [c10] [c9]
14Xiao-Long Yuan
[c9]

Colors in the list of coauthors

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