Hyang-Hwa Choi

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	2009
c1		Hyun-Woo Lee, Won-Joo Yun, Young-Kyoung Choi, Hyang-Hwa Choi, Jong-Jin Lee, Ki-Han Kim, Shin-Deok Kang, Ji-Yeon Yang, Jae-Suck Kang, Hyeng-Ouk Lee, Dong-Uk Lee, Sujeong Sim, Young-Ju Kim, Won-Jun Choi, Keun-Soo Song, Sang-Hoon Shin, Hyung-Wook Moon, Seung-Wook Kwack, Jung-Woo Lee, Nak-Kyu Park, Kwan-Weon Kim, Young-Jung Choi, Jin-Hong Ahn, Byong-Tae Chung: A 1.6V 3.3Gb/s GDDR3 DRAM with dual-mode phase- and delay-locked loop using power-noise management with unregulated power supply in 54nm CMOS. ISSCC 2009: 140-141

Coauthor Index

1	Jin-Hong Ahn	[c1]
2	Won-Jun Choi	[c1]
3	Young-Jung Choi	[c1]
4	Young-Kyoung Choi	[c1]
5	Byong-Tae Chung	[c1]
6	Jae-Suck Kang	[c1]
7	Shin-Deok Kang	[c1]
8	Ki-Han Kim	[c1]
9	Kwan-Weon Kim	[c1]
10	Young-Ju Kim	[c1]
11	Seung-Wook Kwack	[c1]
12	Dong-Uk Lee	[c1]
13	Hyeng-Ouk Lee	[c1]
14	Hyun-Woo Lee	[c1]
15	Jong-Jin Lee	[c1]
16	Jung-Woo Lee	[c1]
17	Hyung-Wook Moon	[c1]
18	Nak-Kyu Park	[c1]
19	Sang-Hoon Shin	[c1]
20	Sujeong Sim	[c1]
21	Keun-Soo Song	[c1]
22	Ji-Yeon Yang	[c1]
23	Won-Joo Yun	[c1]

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