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Ching-Tsun Chou
2010 – today
- 2011
[c15]Byn Choi, Rakesh Komuravelli, Hyojin Sung, Robert Smolinski, Nima Honarmand, Sarita V. Adve, Vikram S. Adve, Nicholas P. Carter, Ching-Tsun Chou: DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism. PACT 2011: 155-166- 2010
- [j7]Xiaofang Chen, Yu Yang, Ganesh Gopalakrishnan, Ching-Tsun Chou: Efficient methods for formally verifying safety properties of hierarchical cache coherence protocols. Formal Methods in System Design 36(1): 37-64 (2010)
2000 – 2009
- 2007
- [c14]Xiaofang Chen, Yu Yang, Michael Delisi, Ganesh Gopalakrishnan, Ching-Tsun Chou: Hierarchical cache coherence protocol verification one level at a time through assume guarantee. HLDVT 2007: 107-114
- 2006
- [c13]Xiaofang Chen, Yu Yang, Ganesh Gopalakrishnan, Ching-Tsun Chou: Reducing Verification Complexity of a Multicore Coherence Protocol Using Assume/Guarantee. FMCAD 2006: 81-88
- 2004
- [c12]Ching-Tsun Chou, Phanindra K. Mannava, Seungjoon Park: A Simple Method for Parameterized Verification of Cache Coherence Protocols. FMCAD 2004: 382-398
- 2003
- [j6]Mani Azimi, Ching-Tsun Chou, Akhilesh Kumar, Victor W. Lee, Phanindra K. Mannava, Seungjoon Park: Experience with Applying Formal Methods to Protocol Specification and System Architecture. Formal Methods in System Design 22(2): 109-116 (2003)
- 2001
- [c11]Kanna Shimizu, David L. Dill, Ching-Tsun Chou: A Specification Methodology by a Collection of Compact Properties as Applied to the Intel® ItaniumTM Processor Bus Protocol. CHARME 2001: 340-354
1990 – 1999
- 1999
- [j5]Ching-Tsun Chou, Doron Peled: Formal Verification of a Partial-Order Reduction Technique for Model Checking. J. Autom. Reasoning 23(3-4): 265-298 (1999)
- [c10]
- 1996
- [j4]Ching-Tsun Chou: Simple Proof Techniques for Property Preservation via Simulation. Inf. Process. Lett. 60(3): 129-134 (1996)
- [c9]Ching-Tsun Chou, Doron Peled: Formal Verification of a Partial-Order Reduction Technique for Model Checking. TACAS 1996: 241-257
- 1995
- [j3]Ching-Tsun Chou: Mechanical Verification of Distributed Algorithms in Higher-Order Logic. Comput. J. 38(2): 152-161 (1995)
- 1994
- [c8]
- [c7]Ching-Tsun Chou: Mechanical Verification of Distributed Algorithms in Higher-Order Logic. TPHOLs 1994: 158-176
- 1993
- [c6]
- 1992
- [c5]Ching-Tsun Chou: A Note on Interactive Theorem Proving with Theorem Continuation Functions. TPHOLs 1992: 59-69
- [c4]
- 1990
- [j2]Ching-Tsun Chou, Israel Cidon, Inder S. Gopal, Shmuel Zaks: Synchronizing asynchronous bounded delay networks. IEEE Transactions on Communications 38(2): 144-147 (1990)
1980 – 1989
- 1989
- [j1]
- 1988
- [c3]
- [c2]
- 1987
- [c1]Ching-Tsun Chou, Israel Cidon, Inder S. Gopal, Shmuel Zaks: Synchronizing Aysnchronous Bounded Delay Networks. WDAG 1987: 212-218
Coauthor Index
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last updated on 2013-01-09 14:34 CET by the dblp team