Oliver Chiu-sing Choy

Man-Ho Ho, Yanqing Ai, Thomas Chun-Pong Chau, Steve C. L. Yuen, Oliver Chiu-sing Choy, Philip Heng Wai Leong, Kong-Pang Pun: Architecture and Design Flow for a Highly Efficient Structured ASIC. IEEE Trans. VLSI Syst. 21(3): 424-433 (2013)

Wen Fan, Oliver Chiu-sing Choy: Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System. IEEE Trans. on Circuits and Systems 59-I(2): 399-408 (2012)

Ke Xu, Min Zhang, Chiu-sing Choy: Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase. Signal Processing Systems 67(3): 317-330 (2012)

Wen Fan, Oliver Chiu-sing Choy: Robust and efficient baseband receiver design for MB-OFDM UWB system. ASP-DAC 2011: 111-112

Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun, Lincoln Lai Kan Leung, Jianping Guo, Yuen Sum Ng, Chi Fat Chan, Weiwei Shi, Yang Hong, Marco Ho, Ki-Leung Mak, Yanqing Ai: RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. J. Low Power Electronics 6(1): 141-149 (2010)

Chi Fat Chan, Kong-Pang Pun, Ka Nang Leung, Jianping Guo, Lincoln Lai Kan Leung, Oliver Chiu-sing Choy: A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. J. Solid-State Circuits 45(3): 587-599 (2010)

Ke Xu, Tsu-Ming Liu, Jiun-In Guo, Oliver Chiu-sing Choy: Methods for Power/Throughput/Area Optimization of H.264/AVC Decoding. Signal Processing Systems 60(1): 131-145 (2010)

Ling Xin, Chiu-sing Choy: A low-latency NoC router with lookahead bypass. ISCAS 2010: 3981-3984

Ke Xu, Oliver Chiu-sing Choy: Low-Power Bitstream-Residual Decoder for H.264/AVC Baseline Profile Decoding. EURASIP J. Emb. Sys. 2009 (2009)

Min Zhang, Oliver Chiu-sing Choy: Low-Cost Allocator Implementations for Networks-on-Chip Routers. VLSI Design 2009 (2009)

Wen Fan, Oliver Chiu-sing Choy, Ka Nang Leung: Robust and Low Complexity Packet Detector Design for MB-OFDM UWB. ISCAS 2009: 693-696

Bing Li, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators. ISCAS 2009: 1545-1548

Chi Fat Chan, Weiwei Shi, Kong-Pang Pun, Lincoln Lai Kan Leung, Ka Nang Leung, Oliver Chiu-sing Choy: A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. ISCAS 2009: 1581-1584

Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan, Ka Nang Leung: A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. on Circuits and Systems 55-II(7): 653-657 (2008)

Ke Xu, Chiu-sing Choy: A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264/AVC. IEEE Trans. Circuits Syst. Video Techn. 18(3): 363-374 (2008)

Ke Xu, Oliver Chiu-sing Choy: A Power-Efficient and Self-Adaptive Prediction Engine for H.264/AVC Decoding. IEEE Trans. VLSI Syst. 16(3): 302-313 (2008)

Min Zhang, Chiu-sing Choy: Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip. NOCS 2008: 207-208

Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Priority-Based Heading One Detector in H.264/AVC Decoding. EURASIP J. Emb. Sys. 2007 (2007)

Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. VLSI Signal Processing 47(3): 223-232 (2007)

Ke Xu, Chiu-sing Choy: Low-power H.264/AVC baseline decoder for portable applications. ISLPED 2007: 256-261

Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198

King-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: Adiabatic Smart Card. APCCAS 2006: 287-290

Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: 0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525

Chi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006

Wei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: An efficient MFCC extraction method in speech recognition. ISCAS 2006

Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A 0.5V fully differential OTA with local common feedback. ISCAS 2006

Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006

Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006

Alex K. Y. Wong, Kong-Pang Pun, Yuan-Ting Zhang, Oliver Chiu-sing Choy: An ECG measurement IC using driven-right-leg circuit. ISCAS 2006

Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006

Pui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155

Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282

Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun: Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002

Wei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845

Jing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004)

Pak-Kee Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Preparing smartcard for the future: from passive to active. IEEE Trans. Consumer Electronics 50(1): 245-250 (2004)

Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: High Speed Curve Interpolating D/A Converter. VLSI Signal Processing 38(1): 5-11 (2004)

Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554

Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240

Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520

Wang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy: An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143

Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710

W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187

Pak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340

Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching: An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747

Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430

Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4

Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32

Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140

Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca: A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224

Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368

Kin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712

Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan: A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001)

Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A low power asynchronous DES. ISCAS (4) 2001: 538-541

Lai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy: A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613

Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913

Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-fat Chan, Wai-kuen Cham: A self-timed ICT chip for image coding. IEEE Trans. Circuits Syst. Video Techn. 9(6): 856-860 (1999)

Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223

Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-fat Chan: A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212-

Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-fat Chan, Wai-kuen Cham: Self-timed 1-D ICT processor. ASP-DAC 1997: 669-670