Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Jordi Cortadella
2010 – today
- 2013
[j37]Ferdinand Peper, Jia Lee, Josep Carmona, Jordi Cortadella, Kenichi Morita: Brownian Circuits: Fundamentals. JETC 9(1): 3 (2013)- [c95]Jordi Cortadella, Javier de San Pedro, Nikita Nikitin, Jordi Petit: Physical-aware system-level design for tiled hierarchical chip multiprocessors. ISPD 2013: 3-10
- 2012
- [c94]Nikita Nikitin, Jordi Cortadella: Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands. ARCS 2012: 50-62
- [c93]Javier de San Pedro, Josep Carmona, Jordi Cortadella, Jordi Petit: Integrating formal verification in an online judge for e-Learning logic circuit design. SIGCSE 2012: 451-456
- 2011
- [j36]Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky: A Scheduling Strategy for Synchronous Elastic Designs. Fundam. Inform. 108(1-2): 1-21 (2011)
- [j35]Marc Galceran Oms, Alexander Gotmanov, Jordi Cortadella, Michael Kishinevsky: Microarchitectural Transformations Using Elasticity. JETC 7(4): 18 (2011)
- 2010
- [j34]Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky: On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics. Discrete Event Dynamic Systems 20(3): 377-407 (2010)
- [j33]Josep Carmona, Jordi Cortadella, Michael Kishinevsky: New Region-Based Algorithms for Deriving Bounded Petri Nets. IEEE Trans. Computers 59(3): 371-384 (2010)
- [c92]Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky: Automatic microarchitectural pipelining. DATE 2010: 961-964
- [c91]Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky: Symbolic performance analysis of elastic systems. ICCAD 2010: 778-785
- [c90]
- [c89]Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras: Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. NOCS 2010: 125-134
- [c88]Josep Carmona, Jordi Cortadella: Process Mining Meets Abstract Interpretation. ECML/PKDD (1) 2010: 184-199
2000 – 2009
- 2009
- [j32]David Bañeres, Jordi Cortadella, Michael Kishinevsky: A Recursive Paradigm to Solve Boolean Relations. IEEE Trans. Computers 58(4): 512-527 (2009)
- [j31]Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alexander Taubin: Elastic Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(10): 1437-1455 (2009)
- [j30]Jordi Cortadella, Alexander Taubin: Guest Editorial: Special Section on Asynchronous Circuits and Systems. IEEE Trans. VLSI Syst. 17(7): 853-854 (2009)
- [c87]Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky: Scheduling Synchronous Elastic Designs. ACSD 2009: 52-59
- [c86]Josep Carmona, Jordi Cortadella, Michael Kishinevsky: Genet: A Tool for the Synthesis and Mining of Petri Nets. ACSD 2009: 181-185
- [c85]Josep Carmona, Jordi Cortadella, Michael Kishinevsky: Divide-and-Conquer Strategies for Process Mining. BPM 2009: 327-343
- [c84]Emre Tuncer, Jordi Cortadella, Luciano Lavagno: Enabling adaptability through elastic clocks. DAC 2009: 8-10
- [c83]Dmitry Bufistov, Jordi Cortadella, Marc Galceran Oms, Jorge Júlvez, Michael Kishinevsky: Retiming and recycling for elastic systems with early evaluation. DAC 2009: 288-291
- [c82]Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky: Speculation in elastic systems. DAC 2009: 292-295
- [c81]David Bañeres, Jordi Cortadella, Michael Kishinevsky: Variable-latency design by function speculation. DATE 2009: 1704-1709
- [c80]David Bañeres, Jordi Cortadella, Michael Kishinevsky: Timing-driven N-way decomposition. ACM Great Lakes Symposium on VLSI 2009: 363-368
- [c79]Jonas Casanova, Jordi Cortadella: Multi-level clustering for clock skew optimization. ICCAD 2009: 547-554
- [c78]Nikita Nikitin, Jordi Cortadella: A performance analytical model for Network-on-Chip with constant service time routers. ICCAD 2009: 571-578
- 2008
- [j29]Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper: Formal methods for the analysis and synthesis of nanometer-scale cellular arrays. JETC 4(2) (2008)
- [j28]Josep Carmona, Jordi Cortadella: Encoding Large Asynchronous Controllers With ILP Techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 20-33 (2008)
- [j27]Jordi Cortadella, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona, Jorge Júlvez: Elasticity and Petri Nets. T. Petri Nets and Other Models of Concurrency 1: 221-249 (2008)
- [c77]
- [c76]Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets 2008: 92-111
- [c75]Josep Carmona, Jordi Cortadella, Michael Kishinevsky: A Region-Based Algorithm for Discovering Petri Nets from Event Logs. BPM 2008: 358-373
- [c74]Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms: Correct-by-construction microarchitectural pipelining. ICCAD 2008: 434-441
- [c73]Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella: Performance optimization of elastic systems using buffer resizing and buffer insertion. ICCAD 2008: 442-448
- [c72]Kyller Costa Gorgônio, Jordi Cortadella: Hardware Synthesis for Asynchronous Communications Mechanisms. SCCC 2008: 135-143
- 2007
- [j26]Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters: Design Automation of Real-Life Asynchronous Devices and Systems. Foundations and Trends in Electronic Design Automation 2(1): 1-133 (2007)
- [j25]Robert Clarisó, Jordi Cortadella: Verification of Concurrent Systems with Parametric Delays Using Octahedra. Fundam. Inform. 78(1): 1-33 (2007)
- [j24]Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, Alexandre Yakovlev: Automating Synthesis of Asynchronous Communication Mechanisms. Fundam. Inform. 78(1): 75-100 (2007)
- [j23]Robert Clarisó, Jordi Cortadella: The octahedron abstract domain. Sci. Comput. Program. 64(1): 115-139 (2007)
- [c71]Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia: A Compositional Method for the Synthesis of Asynchronous Communication Mechanisms. ICATPN 2007: 144-163
- [c70]Jordi Cortadella, Michael Kishinevsky: Synchronous Elastic Circuits with Early Evaluation and Token Counterflow. DAC 2007: 416-419
- [c69]David Bañeres, Jordi Cortadella, Michael Kishinevsky: Layout-aware gate duplication and buffer insertion. DATE 2007: 1367-1372
- [c68]Dmitry Bufistov, Jordi Cortadella, Michael Kishinevsky, Sachin S. Sapatnekar: A general model for performance optimization of sequential systems. ICCAD 2007: 362-369
- 2006
- [j22]Josep Carmona, José Manuel Colom, Jordi Cortadella, Fernando García-Vallés: Synthesis of asynchronous controllers using integer linear programming. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1637-1651 (2006)
- [j21]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou: Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1904-1921 (2006)
- [c67]Michael Kishinevsky, Jordi Cortadella, Bill Grundmann, Sava Krstic, John O'Leary: Synchronous Elastic Circuits. CSR 2006: 3-5
- [c66]Jordi Cortadella, Michael Kishinevsky, Bill Grundmann: Synthesis of synchronous elastic architectures. DAC 2006: 657-662
- [c65]Josep Carmona, Jordi Cortadella: State encoding of large asynchronous controllers. DAC 2006: 939-944
- [c64]Sava Krstic, Jordi Cortadella, Michael Kishinevsky, John O'Leary: Synchronous Elastic Networks. FMCAD 2006: 19-30
- [c63]David Bañeres, Jordi Cortadella, Michael Kishinevsky: Dominator-based partitioning for delay optimization. ACM Great Lakes Symposium on VLSI 2006: 67-72
- [c62]Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky: Performance analysis of concurrent systems with early evaluation. ICCAD 2006: 448-455
- [c61]Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper: From molecular interactions to gates: a systematic approach. ICCAD 2006: 891-898
- 2005
- [j20]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe: Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1492-1514 (2005)
- [c60]Robert Clarisó, Jordi Cortadella: Verification of Concurrent Systems with Parametric Delays Using Octahedra. ACSD 2005: 122-131
- [c59]Jordi Cortadella, Kyller Costa Gorgônio, Fei Xia, Alexandre Yakovlev: Automating Synthesis of Asynchronous Communication Mechanisms. ACSD 2005: 166-175
- [c58]Robert Clarisó, Enric Rodríguez-Carbonell, Jordi Cortadella: Derivation of Non-structural Invariants of Petri Nets Using Abstract Interpretation. ICATPN 2005: 188-207
- 2004
- [j19]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe: Quasi-static Scheduling for Concurrent Architectures. Fundam. Inform. 62(2): 171-196 (2004)
- [c57]Robert Clarisó, Jordi Cortadella: Verification of timed circuits with symbolic delays. ASP-DAC 2004: 628-633
- [c56]Ivan Blunno, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou: Handshake Protocols for De-Synchronization. ASYNC 2004: 149-158
- [c55]David Bañeres, Jordi Cortadella, Michael Kishinevsky: A recursive paradigm to solve Boolean relations. DAC 2004: 416-421
- [c54]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou: From Synchronous to Asynchronous: An Automatic Approach. DATE 2004: 1368-1369
- [c53]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou: Coping with The Variability of Combinational Logic Delays. ICCD 2004: 505-508
- [c52]
- [c51]Peter A. Beerel, Jordi Cortadella, Alex Kondratyev: Bridging the Gap between Asynchronous Design and Designers. VLSI Design 2004: 18-20
- [c50]Nilesh Modi, Jordi Cortadella: Boolean Decomposition Using Two-literal Divisors. VLSI Design 2004: 765-768
- [e2]Jordi Cortadella, Wolfgang Reisig (Eds.): Applications and Theory of Petri Nets 2004, 25th International Conference, ICATPN 2004, Bologna, Italy, June 21-25, 2004, Proceedings. Lecture Notes in Computer Science 3099, Springer 2004, ISBN 3-540-22236-7
- 2003
- [j18]Jordi Cortadella: Timing-driven logic bi-decomposition. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 675-685 (2003)
- [c49]Josep Carmona, Jordi Cortadella, Victor Khomenko, Alexandre Yakovlev: Synthesis of Asynchronous Hardware from Petri Nets. Lectures on Concurrency and Petri Nets 2003: 345-401
- [c48]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe: Quasi-Static Scheduling for Concurrent Architectures. ACSD 2003: 29-40
- [c47]Josep Carmona, Jordi Cortadella: ILP Models for the Synthesis of Asynchronous Control Circuits. ICCAD 2003: 818-826
- 2002
- [j17]Josep Carmona, Jordi Cortadella, Enric Pastor: A structural encoding technique for the synthesis of asynchronous circuits. Fundam. Inform. 50(2): 135-154 (2002)
- [j16]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev: Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 109-130 (2002)
- [c46]Josep Carmona, Jordi Cortadella, Enric Pastor: Synthesis of Reactive Systems: Application to Asynchronous Circuit Design. Concurrency and Hardware Design 2002: 108-151
- [c45]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe: Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN 2002: 80-100
- [c44]Marco A. Peña, Jordi Cortadella, Alexander B. Smirnov, Enric Pastor: A Case Study for the Verification of Complex Timed Circuits: IPCMOS. DATE 2002: 44-51
- [c43]Josep Carmona, Jordi Cortadella: Input/Output Compatibility of Reactive Systems. FMCAD 2002: 360-377
- [c42]Jordi Cortadella: Bi-Decomposition and Tree-Height Reduction for Timing Optimization. IWLS 2002: 233-238
- [c41]Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside: Logic Design of Asynchronous Circuits (Tutorial Abstract). VLSI Design 2002: 26-
- [e1]Jordi Cortadella, Alexandre Yakovlev, Grzegorz Rozenberg (Eds.): Concurrency and Hardware Design, Advances in Petri Nets. Lecture Notes in Computer Science 2549, Springer 2002, ISBN 3-540-00199-9
- 2001
- [j15]Enric Pastor, Jordi Cortadella, Oriol Roig: Symbolic Analysis of Bounded Petri Nets. IEEE Trans. Computers 50(5): 432-448 (2001)
- [c40]Josep Carmona, Jordi Cortadella, Enric Pastor: A structural encoding technique for the synthesis of asynchronous circuits. ACSD 2001: 157-166
- [c39]Gianluca Cornetta, Jordi Cortadella: A Multi-Radix Approach to Asynchronous Division. ASYNC 2001: 25-
- 2000
- [c38]
- [c37]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Hardware and Petri Nets: Application to Asynchronous Circuit Design. ICATPN 2000: 1-15
- [c36]Marco A. Peña, Jordi Cortadella, Enric Pastor, Alex Kondratyev: Formal Verification of Safety Properties in Timed Circuits. ASYNC 2000: 2-11
- [c35]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli: Task generation and compile-time scheduling for mixed data-control embedded software. DAC 2000: 489-494
1990 – 1999
- 1999
- [j14]Fermín Sánchez, Jordi Cortadella, Rosa M. Badia: Optimal exploration of the unrolling degree for software pipelining. Journal of Systems Architecture 45(6-7): 505-517 (1999)
- [j13]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev: Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1221-1236 (1999)
- [c34]Enric Pastor, Jordi Cortadella, Marco A. Peña: Structural Methods to Improve the Symbolic Analysis of Petri Nets. ICATPN 1999: 26-45
- [c33]Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno: Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. ASYNC 1999: 36-
- [c32]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. DAC 1999: 110-115
- [c31]Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken: CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121
- [c30]Gianluca Cornetta, Jordi Cortadella: A Radix-16 SRT Division Unit with Speculation of the Quotient Digits. Great Lakes Symposium on VLSI 1999: 74-77
- [c29]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev: What is the cost of delay insensitivity? ICCAD 1999: 316-323
- [c28]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens: Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. ICCAD 1999: 324-331
- 1998
- [j12]Enric Musoll, Jordi Cortadella: Register-Transfer Level Transformations for Low-Power Data-Paths. Integrated Computer-Aided Engineering 5(4): 315-332 (1998)
- [j11]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella, Luciano Lavagno: The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. Journal of Circuits, Systems, and Computers 8(1): 67-118 (1998)
- [j10]Fermín Sánchez, Jordi Cortadella: Reducing Register Pressure in Software Pipelining. J. Inf. Sci. Eng. 14(1): 265-279 (1998)
- [j9]Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Deriving Petri Nets for Finite Transition Systems. IEEE Trans. Computers 47(8): 859-882 (1998)
- [j8]Enric Pastor, Jordi Cortadella, Alex Kondratyev, Oriol Roig: Structural methods for the synthesis of speed-independent circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1108-1129 (1998)
- [j7]Enric Musoll, Tomás Lang, Jordi Cortadella: Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Trans. VLSI Syst. 6(4): 568-572 (1998)
- [c27]Jordi Cortadella: Combining Structural and Symbolic Methods for the Verification of Concurrent Systems. ACSD 1998: 2-7
- [c26]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD 1998: 152-163
- [c25]Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev: Asynchronous Interface Specification, Analysis and Synthesis. DAC 1998: 2-7
- [c24]Enric Pastor, Jordi Cortadella: Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. DATE 1998: 790-795
- [c23]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD 1998: 324-331
- [c22]Tomás Lang, Enric Musoll, Jordi Cortadella: Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. ICCD 1998: 414-419
- 1997
- [j6]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: A region-based theory for state assignment in speed-independent circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 793-812 (1997)
- [c21]Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN 1997: 328-347
- [c20]Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev: Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. ASYNC 1997: 240-253
- [c19]Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno: Partial order based approach to synthesis of speed-independent circuits. ASYNC 1997: 254-
- [c18]Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella: Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. DAC 1997: 16-21
- [c17]Oriol Roig, Jordi Cortadella, Marco A. Peña, Enric Pastor: Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. DAC 1997: 620-625
- [c16]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. ED&TC 1997: 98-105
- [c15]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev: Decomposition and technology mapping of speed-independent circuits using Boolean relations. ICCAD 1997: 220-227
- [c14]Enric Musoll, Tomás Lang, Jordi Cortadella: Exploiting the locality of memory references to reduce the address bus energy. ISLPED 1997: 202-207
- 1996
- [c13]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. DAC 1996: 63-66
- [c12]Fermín Sánchez, Jordi Cortadella: RESIS: A New Methodology for Register Optimization in Software Pipelining. Euro-Par, Vol. II 1996: 824-832
- 1995
- [c11]Oriol Roig, Jordi Cortadella, Enric Pastor: Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets. Application and Theory of Petri Nets 1995: 374-391
- [c10]Oriol Roig, Jordi Cortadella, Enric Pastor: Hierarchical gate-level verification of speed-independent circuits. ASYNC 1995: 128-137
- [c9]Enric Pastor, Jordi Cortadella, Oriol Roig: A new look at the conditions for the synthesis of speed-independent circuits. Great Lakes Symposium on VLSI 1995: 230-
- [c8]Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Synthesizing Petri nets from state-based models. ICCAD 1995: 164-171
- [c7]Enric Musoll, Jordi Cortadella: High-level synthesis techniques for reducing the activity of functional units. ISLPD 1995: 99-104
- [c6]
- 1994
- [j5]Jordi Cortadella, Tomás Lang: High-Radix Division and Square-Root with Speculation. IEEE Trans. Computers 43(8): 919-931 (1994)
- [c5]Enric Pastor, Oriol Roig, Jordi Cortadella, Rosa M. Badia: Petri Net Analysis Using Boolean Manipulation. Application and Theory of Petri Nets 1994: 416-435
- [c4]Jordi Cortadella, José A. B. Fortes, Edward A. Lee: Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction. HICSS (1) 1994: 56-57
- 1993
- [j4]Jordi Cortadella: Session B2: Processor Architecture II. Microprocessing and Microprogramming 38(1-5): 131 (1993)
- [j3]Fermín Sánchez, Jordi Cortadella: Resource-constrained pipelining based on loop transformations. Microprocessing and Microprogramming 38(1-5): 429-436 (1993)
- [j2]Mateo Valero, Jordi Cortadella, Antonio González: Chairmen's introduction. Microprocessing and Microprogramming 38(1-5) (1993)
- [c3]Jordi Cortadella, Tomás Lang: Division with speculation of quotient digits. IEEE Symposium on Computer Arithmetic 1993: 87-94
- [c2]Enric Pastor, Jordi Cortadella: Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs. ICCAD 1993: 250-254
- [c1]Enric Pastor, Jordi Cortadella: An Efficient Unique State Coding Algorithm for Signal Transition Graphs. ICCD 1993: 174-177
- 1992
- [j1]Jordi Cortadella, José M. Llabería: Evaluation of A + B = K Conditions Without Carry Propagation. IEEE Trans. Computers 41(11): 1484-1488 (1992)
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-06-13 23:06 CEST by the dblp team