| 2013 | ||
|---|---|---|
| c14 | Vijay D'Silva, Leopold Haller, Daniel Kroening: Abstract conflict driven learning. POPL 2013: 143-154 | |
| c13 | ||
| c12 | Martin Brain, Vijay D'Silva, Leopold Haller, Alberto Griggio, Daniel Kroening: An Abstract Interpretation of DPLL(T). VMCAI 2013: 455-475 | |
| 2012 | ||
| c11 | Vijay D'Silva, Leopold Haller, Daniel Kroening: Satisfiability Solvers Are Static Analysers. SAS 2012: 317-333 | |
| c10 | Vijay D'Silva, Leopold Haller, Daniel Kroening, Michael Tautschnig: Numeric Bounds Analysis with Conflict-Driven Learning. TACAS 2012: 48-63 | |
| 2010 | ||
| j3 | Thomas Wahl, Vijay D'Silva: A lazy approach to symmetry reduction. Formal Asp. Comput. 22(6): 713-733 (2010) | |
| c9 | ||
| c8 | Vijay D'Silva, Daniel Kroening, Mitra Purandare, Georg Weissenbacher: Interpolant Strength. VMCAI 2010: 129-145 | |
| 2009 | ||
| j2 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. ACM Trans. Design Autom. Electr. Syst. 14(2) (2009) | |
| c7 | ||
| 2008 | ||
| j1 | Vijay D'Silva, Daniel Kroening, Georg Weissenbacher: A Survey of Automated Techniques for Formal Software Verification. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1165-1178 (2008) | |
| c6 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: A Formal Approach To The Protocol Converter Problem. DATE 2008: 294-299 | |
| c5 | Vijay D'Silva, Mitra Purandare, Daniel Kroening: Approximation Refinement for Interpolation-Based Model Checking. VMCAI 2008: 68-82 | |
| 2007 | ||
| c4 | Vijay D'Silva, Sampada Sonalkar, S. Ramesh: Existential abstractions for distributed reactive systems via syntactic transformations. EMSOFT 2007: 240-248 | |
| 2004 | ||
| c3 | S. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi: A Toolset for Modelling and Verification of GALS Systems. CAV 2004: 506-509 | |
| c2 | Vijay D'Silva, S. Ramesh, Arcot Sowmya: Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures. DATE 2004: 390-395 | |
| c1 | Vijay D'Silva, S. Ramesh, Arcot Sowmya: Bridge Over Troubled Wrappers: Automated Interface Synthesis. VLSI Design 2004: 189-194 | |
Colors in the list of coauthors
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