| 2008 | ||
|---|---|---|
| j2 | Vinita V. Deodhar, Jeffrey A. Davis: Optimal Voltage Scaling, Repeater Insertion, and Wire Sizing for Wave-Pipelined Global Interconnects. IEEE Trans. on Circuits and Systems 55-I(4): 1023-1030 (2008) | |
| 2006 | ||
| c4 | Ajay Joshi, Vinita V. Deodhar, Jeffrey A. Davis: Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing. VLSI Design 2006: 773-776 | |
| 2005 | ||
| j1 | Vinita V. Deodhar, Jeffrey A. Davis: Optimization of throughput performance for low-power VLSI interconnects. IEEE Trans. VLSI Syst. 13(3): 308-318 (2005) | |
| c3 | Vinita V. Deodhar, Jeffrey A. Davis: Voltage Scaling, Wire Sizing and Repeater Insertion Design Rules for Wave-Pipelined VLSI Global Interconnect Circuits. ISQED 2005: 592-597 | |
| c2 | Vinita V. Deodhar, Jeffrey A. Davis: Designing for signal integrity in wave-pipelined SOC global interconnects. SoCC 2005: 207-210 | |
| 2003 | ||
| c1 | Vinita V. Deodhar, Jeffrey A. Davis: Voltage scaling and repeater insertion for high-throughput low-power interconnects. ISCAS (5) 2003: 349-352 | |
| 1 | Jeffrey A. Davis | |
| 2 | Ajay Joshi |
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