Giri Devarayanadurg Coauthor index pubzone.org

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c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Anand Ramalingam, Giri Devarayanadurg, David Z. Pan: Accurate power grid analysis with behavioral transistor network modeling. ISPD 2007: 43-50
2001
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Mani Soma, Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg: Hierarchical ATPG for Analog Circuits and Systems. IEEE Design & Test of Computers 18(1): 72-81 (2001)
1999
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Giri Devarayanadurg, Mani Soma, Prashant Goteti, Sam D. Huynh: Test set selection for structural faults in analog IC's. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1026-1039 (1999)
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma: Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems. Asian Test Symposium 1999: 239-
1996
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Giri Devarayanadurg, Prashant Goteti, Mani Soma: Hierarchy Based Statistical Fault Simulation of Mixed-Signal ICs. ITC 1996: 521-527
1995
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Giri Devarayanadurg, Mani Soma: Dynamic test signal design for analog ICs. ICCAD 1995: 627-630
1994
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Giri Devarayanadurg, Mani Soma: Analytical fault modeling and static test generation for analog ICs. ICCAD 1994: 44-47

Coauthor Index

1Prashant Goteti
[j1] [c3]
2Sam D. Huynh
[j2] [j1] [c4]
3Seongwon Kim
[j2] [c4]
4David Z. Pan (David Zhigang Pan)
[c5]
5Anand Ramalingam
[c5]
6Mani Soma
[j2] [j1] [c4] [c3] [c2] [c1]
7Jinyan Zhang
[j2] [c4]

Colors in the list of coauthors

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