| 2007 | ||
|---|---|---|
| c5 | Anand Ramalingam, Giri Devarayanadurg, David Z. Pan: Accurate power grid analysis with behavioral transistor network modeling. ISPD 2007: 43-50 | |
| 2001 | ||
| j2 | Mani Soma, Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg: Hierarchical ATPG for Analog Circuits and Systems. IEEE Design & Test of Computers 18(1): 72-81 (2001) | |
| 1999 | ||
| j1 | Giri Devarayanadurg, Mani Soma, Prashant Goteti, Sam D. Huynh: Test set selection for structural faults in analog IC's. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1026-1039 (1999) | |
| c4 | Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma: Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems. Asian Test Symposium 1999: 239- | |
| 1996 | ||
| c3 | Giri Devarayanadurg, Prashant Goteti, Mani Soma: Hierarchy Based Statistical Fault Simulation of Mixed-Signal ICs. ITC 1996: 521-527 | |
| 1995 | ||
| c2 | ||
| 1994 | ||
| c1 | Giri Devarayanadurg, Mani Soma: Analytical fault modeling and static test generation for analog ICs. ICCAD 1994: 44-47 | |
| 1 | Prashant Goteti | |
| 2 | Sam D. Huynh | |
| 3 | Seongwon Kim | |
| 4 | David Z. Pan (David Zhigang Pan) | |
| 5 | Anand Ramalingam | |
| 6 | Mani Soma | |
| 7 | Jinyan Zhang |
Colors in the list of coauthors
Last update Tue May 21 08:10:42 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page