Doron Drusinsky

Doron Drusinsky: Behavioral and Temporal Pattern Detection within Financial Data with Hidden Information. J. UCS 18(14): 1950-1966 (2012)

Doron Drusinsky, Man-tak Shing: Validating quality attribute requirements via execution-based model checking. Softw., Pract. Exper. 42(7): 853-875 (2012)

James Bret Michael, Doron Drusinsky, Thomas W. Otani, Man-tak Shing: Verification and Validation for Trustworthy Software Systems. IEEE Software 28(6): 86-92 (2011)

Kevin D. Foster, John J. Shea, Doron Drusinsky, James Bret Michael, Thomas W. Otani, Man-tak Shing: Removing the Boundaries: Steps Toward a Cloud Nirvana. GrC 2010: 167-171

Doron Drusinsky, Man-tak Shing: Validating quality attribute requirements via execution-based model checking. International Symposium on Rapid System Prototyping 2010: 1-7

Doron Drusinsky, Man-tak Shing: Using UML Statecharts with Knowledge Logic Guards. MoDELS 2009: 586-590

Doron Drusinsky, James Bret Michael, Man-tak Shing: A framework for computer-aided validation. ISSE 4(2): 161-168 (2008)

Doron Drusinsky, James Bret Michael, Man-tak Shing: A Visual Tradeoff Space for Formal Verification and Validation Techniques. IEEE Systems Journal 2(4): 513-519 (2008)

Doron Drusinsky, James Bret Michael, Thomas W. Otani, Man-tak Shing: Validating UML Statechart-Based Assertions Libraries for Improved Reliability and Assurance. SSIRI 2008: 47-51

Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir: Creating and Validating Embedded Assertion Statecharts. IEEE Distributed Systems Online 8(5) (2007)

Thomas W. Otani, Mikhail Auguston, Thomas S. Cook, Doron Drusinsky, James Bret Michael, Man-tak Shing: A design pattern for using non-developmental items in real-time Java. JTRES 2007: 135-143

Doron Drusinsky, Man-tak Shing: Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation. IEEE International Workshop on Rapid System Prototyping 2007: 82-88

Doron Drusinsky: Modeling and verification using UML statecharts - a working guide to reactive system design, runtime monitoring and execution-based model checking. Elsevier 2006, isbn 978-0-7506-7949-7, pp. I-XII, 1-306

Doron Drusinsky: On-line Monitoring of Metric Temporal Logic with Time-Series Constraints Using Alternating Finite Automata. J. UCS 12(5): 482-498 (2006)

Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir: Creation and Validation of Embedded Assertion Statecharts. IEEE International Workshop on Rapid System Prototyping 2006: 17-23

Doron Drusinsky: Semantics and Runtime Monitoring of TLCharts: Statechart Automata with Temporal Logic Conditioned Transitions. Electr. Notes Theor. Comput. Sci. 113: 3-21 (2005)

Man-tak Shing, Doron Drusinsky: Architectural Design, Behavior Modeling and Run-Time Verification of Network Embedded Systems. Monterey Workshop 2005: 281-303

Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir: Test-Time, Run-Time, and Simulation-Time Temporal Assertions in RSP. IEEE International Workshop on Rapid System Prototyping 2005: 105-110

Guillaume P. Brat, Doron Drusinsky, Dimitra Giannakopoulou, Allen Goldberg, Klaus Havelund, Michael R. Lowry, Corina S. Pasareanu, Arnaud Venet, Willem Visser, Richard Washington: Experimental Evaluation of Verification and Validation Tools on Martian Rover Software. Formal Methods in System Design 25(2-3): 167-198 (2004)

Doron Drusinsky: Automatic Simulation of Network Problems in UDP-Based Java Programs Temporal Logic and Natural Language Conditioned Transitions. IPDPS 2004

Doron Drusinsky, Man-tak Shing: TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions. IEEE International Workshop on Rapid System Prototyping 2004: 29-36

Doron Drusinsky, Man-tak Shing: Monitoring Temporal Logic Specifications Combined with Time Series Constraints. J. UCS 9(11): 1261-1276 (2003)

Cyrille Artho, Doron Drusinsky, Allen Goldberg, Klaus Havelund, Michael R. Lowry, Corina S. Pasareanu, Grigore Rosu, Willem Visser: Experiments with Test Case Generation and Runtime Analysis. Abstract State Machines 2003: 87-107

Doron Drusinsky: Monitoring Temporal Rules Combined with Time Series. CAV 2003: 114-117

Doron Drusinsky, Man-tak Shing: Verification of Timing Properties in Rapid System Prototyping. IEEE International Workshop on Rapid System Prototyping 2003: 47-

Doron Drusinsky, Garth Watney: Applying Run-Time Monitoring to the Deep-Impact Fault Protection Engine. SEW 2003: 127

Doron Drusinsky: The Temporal Rover and the ATG Rover. SPIN 2000: 323-330

Doron Drusinsky, David Harel: On the Power of Bounded Concurrency I: Finite Automata. J. ACM 41(3): 517-539 (1994)

Doron Drusinsky, David Harel: Using statecharts for hardware description and synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 8(7): 798-807 (1989)

Doron Drusinsky, David Harel: On the Power of Cooperative Concurrency. Concurrency 1988: 74-103