Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Jos T. J. van Eijndhoven
2000 – 2009
- 2009
[j6]Anca Mariana Molnos, Sorin Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors. Signal Processing Systems 57(2): 155-172 (2009)- 2007
[j5]Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors. T. HiPEAC 1: 279-297 (2007)
[c31]Xing Li, Paulus Stravers, Jos T. J. van Eijndhoven, Robert-Paul Berretty: 2D-to-3D TV Image Mapping on TriMedias. HPCNCS 2007: 1-5
[i1]Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Multimedia Communicating Tasks. CoRR abs/0710.4658 (2007)- 2006
[c30]Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Static cache partitioning robustness analysis for embedded on-chip multi-processors. Conf. Computing Frontiers 2006: 353-360
[c29]Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional, efficient caches for a chip multi-processor. DATE 2006: 345-350
[c28]Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Throughput optimization via cache partitioning for embedded multiprocessors. ICSAMOS 2006: 185-192- 2005
[j4]Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven: Hardwired MPEG-4 repetitive padding. IEEE Transactions on Multimedia 7(2): 261-268 (2005)
[j3]Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers: IEEE-Compliant IDCT on FPGA-Augmented TriMedia. VLSI Signal Processing 39(3): 195-212 (2005)
[c27]Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Multimedia Communicating Tasks. DATE 2005: 932-937- 2004
[j2]Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: Pel reconstruction on FPGA-augmented TriMedia. IEEE Trans. VLSI Syst. 12(6): 622-635 (2004)
[c26]Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Data Intensive Applications. DATE 2004: 728-729
[c25]Martijn J. Rutten, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Evert-Jan D. Pol: Application design trajectory towards reusable coprocessors MPEG case study. ESTImedia 2004: 33-38- 2003
[c24]Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven: Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor. ASAP 2003: 250-259
[c23]Andrei Terechko, Erwan Le Thenaff, Manish Garg, Jos T. J. van Eijndhoven, Henk Corporaal: Inter-Cluster Communication Models for Clustered VLIW Processors. HPCA 2003: 354-364
[c22]Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Anshul Kumar: Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks. VLSI Design 2003: 177-182- 2002
[j1]Martijn J. Rutten, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Pieter van der Wolf, Evert-Jan D. Pol, Om Prakash Gangwal, Adwin H. Timmer: A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IEEE Design & Test of Computers 19(4): 39-50 (2002)
[c21]Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol: Design of multi-tasking coprocessor control for Eclipse. CODES 2002: 139-144
[c20]Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol: Robust Media Processing in a Flexible and Cost-Effective Network of Multi-Tasking Coprocessors. ECRTS 2002: 223-230
[c19]Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. FCCM 2002: 261-
[c18]Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers: Field-Programmable Custom Computing Machines - A Taxonomy -. FPL 2002: 79-88
[c17]Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan: Speculative Trace Scheduling in VLIW Processors. ICCD 2002: 408-413
[c16]Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol, Egbert G. T. Jaspers, Pieter van der Wolf, Om Prakash Gangwal, Adwin H. Timmer: Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IPDPS 2002
[c15]Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan: On the Benefits of Speculative Trace Scheduling in VLIW Processors. PDPTA 2002: 822-828
[c14]Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. Embedded Processor Design Challenges 2002: 224-241
[c13]Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven: A 2D Addressing Mode for Multimedia Applications. Embedded Processor Design Challenges 2002: 291-306
[c12]Pieter van der Wolf, W. M. Kruijtzer, Jos T. J. van Eijndhoven: System-Level Design of Embedded Media Systems (Tutorial Abstract). VLSI Design 2002: 14-15- 2001
[c11]Andrei Terechko, Evert-Jan D. Pol, Jos T. J. van Eijndhoven: PRMDL: a machine description language for clustered VLIW architectures. DATE 2001: 821
[c10]Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers: An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia. FCCM 2001: 160-169
[c9]Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. ICCD 2001: 425-430
1990 – 1999
- 1999
[c8]Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel: TriMedia CPU64 Architecture. ICCD 1999: 586-592
[c7]Evert-Jan D. Pol, Bas Aarts, Jos T. J. van Eijndhoven, P. Struik, Pieter van der Wolf, Frans Sijstermans, M. J. A. Tromp, Jan-Willem van de Waerdt: TriMedia CPU64 Application Development Environment. ICCD 1999: 593-598- 1996
[c6]Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, Jos T. J. van Eijndhoven, Jochen A. G. Jess: A Constructive Method for Exploiting Code Motion. ISSS 1996: 51-56- 1994
[c5]Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen A. G. Jess: On Design Rule Correct Maze Routing. EDAC-ETC-EUROASIC 1994: 407-411- 1992
[c4]J. F. M. Theeuwen, H. M. A. M. Arts, Jos T. J. van Eijndhoven, H. J. H. Sleuters, J. H. P. Wijdeven: Module Generation in an Architectural Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 359-371- 1991
[c3]H. M. A. M. Arts, Jos T. J. van Eijndhoven, Leon Stok: Flexible Block-Multiplier Generation. ICCAD 1991: 106-109- 1990
[c2]M. T. van Stiphout, Jos T. J. van Eijndhoven, H. W. Buurman: PLATO: a new piecewise linear simulation tool. EURO-DAC 1990: 235-239
[c1]Jos T. J. van Eijndhoven, M. T. van Stiphout, H. W. Buurman: Multirate integration in a direct simulation method. EURO-DAC 1990: 306-311
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2012-12-02 21:26 CET by the dblp team



