Abdel Ejnioui Coauthor index pubzone.org

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DBLP keys2009
c24Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui: Runtime Adaptation in Reconfigurable System-on-Chips. ICPP Workshops 2009: 535-541
2008
c23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Paul Bao: A parallel architecture for GFA modeling in video coding. CIT 2008: 595-600
c22no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Paul Bao: A Parallel Array to Accelerate GFA Modeling in Video Coding. ERSA 2008: 252-258
2007
j5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ronald F. DeMara, Yili Tseng, Abdel Ejnioui: Tiered Algorithm for Distributed Process Quiescence and Termination Detection. IEEE Trans. Parallel Distrib. Syst. 18(11): 1529-1538 (2007)
c21no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Paul Bao: Hardware Acceleration of the Generalized Finite Automata Algorithm. CDES 2007: 140-146
c20no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui: Prototyping of a Two-Phase Micropipeline on FPGAs. ERSA 2007: 138-146
c19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui: FPGA Prototyping of a Two-Phase Self-Oscillating Micropipeline. ISVLSI 2007: 437-438
2006
c18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Anuja Jayraj Thakkar, Abdel Ejnioui: Pipelining of double precision floating point division and square root operations. ACM Southeast Regional Conference 2006: 488-493
c17no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Heng Tan, Ronald F. DeMara, Anuja Jayraj Thakkar, Abdel Ejnioui, Jason Sattler: Complexity and Performance Evaluation of Two Partial Reconfiguration Interfaces on FPGAs: A Case Study. ERSA 2006: 253-256
c16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Rashad Oreifej, Abdelhalim Alsharqawi, Abdel Ejnioui: Synthesis of Pipelined SRSL Circuits. ISVLSI 2006: 71-76
c15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdelhalim Alsharqawi, Abdel Ejnioui: Clockless Pipelining for Coarse Grain Datapaths. VLSI Design 2006: 749-753
2005
c14no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Ronald F. DeMara: Area Reclamation Strategies and Metrics for SRAM-Based Reconfigurable Devices. ERSA 2005: 196-202
c13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdelhalim Alsharqawi, Abdel Ejnioui: Synthesis of Self-Resetting Stage Logic Pipelines. ISVLSI 2005: 260-262
2004
c12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Abdelhalim Alsharqawi: Pipeline-Level Control of Self-Resetting Pipelines. DSD 2004: 342-349
c11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Abdelhalim Alsharqawi: Self-resetting stage logic pipelines. ACM Great Lakes Symposium on VLSI 2004: 174-177
c10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ravi Namballa, Nagarajan Ranganathan, Abdel Ejnioui: Control and Data Flow Graph Extraction for High-Level Synthesis. ISVLSI 2004: 192
c9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Abdelhalim Alsharqawi: Pipeline Design Based on Self-Resetting Stage Logic. ISVLSI 2004: 254-257
c8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, Abdelkader Rhiati: A Reconfigurable Memory Management Core for Java Applications. ISVLSI 2004: 309-312
2003
j4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Multiterminal net routing for partial crossbar-based multi-FPGA systems. IEEE Trans. VLSI Syst. 11(1): 71-78 (2003)
j3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Routing on field-programmable switch matrices. IEEE Trans. VLSI Syst. 11(2): 283-287 (2003)
c7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
W. Kuang, J. S. Yuan, Abdel Ejnioui: Supply Voltage Scalable System Design Using Self-Timed Circuits. ISVLSI 2003: 161-166
2002
c6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
K. Sitaraman, N. Ranganathan, Abdel Ejnioui: A VLSI Architecture for Object Recognition Using Tree Matching. ASAP 2002: 325-334
2001
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: A partitioning algorithm for technoiogy-mapped designs on single-chip emulation systems. IEEE Trans. VLSI Syst. 9(2): 407-410 (2001)
2000
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Design Partitioning on Single-Chip Emulation Systems. VLSI Design 2000: 234-239
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Routing on Switch Matrix Multi-FPGA Systems. VLSI Design 2000: 248-253
1999
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Vamsi Krishna, N. Ranganathan, Abdel Ejnioui: A tree-matching chip. IEEE Trans. VLSI Syst. 7(2): 277-280 (1999)
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems. FPGA 1999: 176-185
1996
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Vamsi Krishna, Abdel Ejnioui, N. Ranganathan: A tree matching chip. VLSI Design 1996: 280-285
1995
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Abdel Ejnioui, N. Ranganathan: Systolic algorithms for tree pattern matching. ICCD 1995: 650-702

Coauthor Index

1Abdelhalim Alsharqawi
[c16] [c15] [c13] [c12] [c11] [c9]
2Paul Bao
[c23] [c22] [c21]
3Ronald F. DeMara
[j5] [c17] [c14]
4Vamsi Krishna
[j1] [c2]
5W. Kuang
[c7]
6Ravi Namballa
[c10]
7Rashad Oreifej
[c16]
8N. Ranganathan (Nagarajan Ranganathan)
[c10] [j4] [j3] [c6] [j2] [c5] [c4] [j1] [c3] [c2] [c1]
9Abdelkader Rhiati
[c8]
10Jason Sattler
[c17]
11K. Sitaraman
[c6]
12Heng Tan
[c17]
13Anuja Jayraj Thakkar
[c18] [c17]
14Yili Tseng
[j5]
15J. S. Yuan
[c7]

Colors in the list of coauthors

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