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A. Ege Engin
2010 – today
- 2013
[c8]- 2011
- [j1]Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James F. Buckwalter, Chung-Kuan Cheng: Prediction and Comparison of High-Performance On-Chip Global Interconnection. IEEE Trans. VLSI Syst. 19(7): 1154-1166 (2011)
- [c7]A. Ege Engin, N. Srinidhi Raghavan: Metal semiconductor (MES) TSVs in 3D ICs: Electrical modeling and design. 3DIC 2011: 1-4
- 2010
- [c6]Wanping Zhang, Ling Zhang, Amirali Shayan Arani, Wenjian Yu, Xiang Hu, Zhi Zhu, A. Ege Engin, Chung-Kuan Cheng: On-chip power network optimization with decoupling capacitors and controlled-ESRs. ASP-DAC 2010: 119-124
- [c5]Peng Du, Xiang Hu, Shih-Hung Weng, Amirali Shayan Arani, Xiaoming Chen, A. Ege Engin, Chung-Kuan Cheng: Worst-case noise prediction with non-zero current transition times for early power distribution system verification. ISQED 2010: 624-631
2000 – 2009
- 2009
- [c4]Amirali Shayan Arani, Xiang Hu, Wanping Zhang, Chung-Kuan Cheng, A. Ege Engin, Xiaoming Chen, Mikhail Popovich: 3D stacked power distribution considering substrate coupling. ICCD 2009: 225-230
- [c3]Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James F. Buckwalter, Chung-Kuan Cheng: Prediction of high-performance on-chip global interconnection. SLIP 2009: 61-68
- [c2]Xiang Hu, Wenbo Zhao, Peng Du, Yulei Zhang, Amirali Shayan Arani, Christopher Pan, A. Ege Engin, Chung-Kuan Cheng: On the bound of time-domain power supply noise based on frequency-domain target impedance. SLIP 2009: 69-76
- [c1]Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shayan Arani, A. Ege Engin, Chung-Kuan Cheng: Predicting the worst-case voltage violation in a 3D power network. SLIP 2009: 93-98
Coauthor Index
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last updated on 2013-05-04 21:45 CEST by the dblp team