Michael Ogbonna Esonu

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	1995
j2		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Area efficient computing structures for concurrent error detection in systolic arrays. VLSI Signal Processing 10(3): 237-260 (1995)
j1		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili: Design techniques for fault-tolerant systolic arrays. VLSI Signal Processing 11(1-2): 151-168 (1995)
	1993
c5		Michael Ogbonna Esonu, Dhamin Al-Khalili, Come Rozon: Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. ISCAS 1993: 1714-1717
	1992
c4		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Design Methodology for Fault-Tolerant Systolic Array Architectures. ICPP (2) 1992: 267-274
	1991
c3		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Area Efficient Computing Structures for Concurrent Error Detection in Systolic Architectures. ICPP (1) 1991: 484-491
c2		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: On the Design of Optimal Fault-Tolerant Systolic Array Architecures. IPPS 1991: 352-357
	1990
c1		Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri: Design of optimal systolic arrays: a systematic approach. SPDP 1990: 166-173

Coauthor Index

1	Asim J. Al-Khalili (A. J. Al-Khalili)	[j2] [j1] [c4] [c3] [c2] [c1]
2	Dhamin Al-Khalili	[j1] [c5]
3	Salim Hariri	[j2] [j1] [c4] [c3] [c2] [c1]
4	Come Rozon	[c5]

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