| 2005 | ||
|---|---|---|
| c1 | Ilia Polian, Thomas Fiehn, Bernd Becker, John P. Hayes: A Family of Logical Fault Models for Reversible Circuits. Asian Test Symposium 2005: 422-427 | |
| 1 | Bernd Becker | |
| 2 | John P. Hayes | |
| 3 | Ilia Polian |
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