| 2012 | ||
|---|---|---|
| c8 | Holger Flatt, Sebastian Schriegel, Jürgen Jasperneite, Frank Schewe: An FPGA based approach for the enhancement of COTS switch ASICs with real-time Ethernet functions. ETFA 2012: 1-4 | |
| 2011 | ||
| b1 | Holger Flatt: Eine konfigurierbare RISC-, Coprozessor-Architektur zur Echtzeitverarbeitung von Objekterkennungsverfahren. University of Hanover 2011, isbn 978-3-8322-9977-4, pp. 1-119 | |
| c7 | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume: A hardware accelerated configurable ASIP architecture for embedded real-time video-based driver assistance applications. ICSAMOS 2011: 209-216 | |
| 2010 | ||
| c6 | Holger Flatt, Holger Blume, Peter Pirsch: Mapping of a Real-Time Object Detection Application onto a Configurable RISC/Coprocessor Architecture at Full HD Resolution. ReConFig 2010: 452-457 | |
| c5 | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch: Real-time stereo vision system using semi-global matching disparity estimation: Architecture and FPGA-implementation. ICSAMOS 2010: 93-101 | |
| 2009 | ||
| c4 | Holger Flatt, Ingo Schmadecke, Michael Kärgel, Holger Blume, Peter Pirsch: Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures. ICSAMOS 2009: 125-132 | |
| 2008 | ||
| c3 | Holger Flatt, Steffen Blume, Sebastian Hesselbarth, Torsten Schünemann, Peter Pirsch: A parallel hardware architecture for connected component labeling based on fast label merging. ASAP 2008: 144-149 | |
| 2007 | ||
| c2 | Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch: A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing. SAMOS 2007: 241-250 | |
| c1 | Guillermo Payá Vayá, Thomas Jambor, Konstantin Septinus, Sebastian Hesselbarth, Holger Flatt, Marc Freisfeld, Peter Pirsch: ChipDesign: from theory to real world. WCAE 2007: 58-64 | |
Colors in the list of coauthors
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