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Josef Fleischmann
2000 – 2009
- 2000
[c8]Norbert Fröhlich, Volker Gloeckel, Josef Fleischmann: A New Partitioning Method for Parallel Simulation of VLSI Circuits on Transistor Level. DATE 2000: 679-684
1990 – 1999
- 1999
[j1]Josef Fleischmann, Klaus Buchenrieder: Prototyping Networked Embedded Systems. IEEE Computer 32(2): 116-119 (1999)
[c7]Josef Fleischmann, Klaus Buchenrieder, Rainer Kress: Java Driven Codesign and Prototyping of Networked Embedded Systems. DAC 1999: 794-797
[c6]Josef Fleischmann, Klaus Buchenrieder, Rainer Kress: Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components. DATE 1999: 768-769- 1998
[c5]Josef Fleischmann, Klaus Buchenrieder, Rainer Kress: A hardware/software prototyping environment for dynamically reconfigurable embedded systems. CODES 1998: 105-109- 1997
[c4]Josef Fleischmann, Rolf Schlagenhaft, Martin Peller, Norbert Fröhlich: OLIVIA: Objectoriented Logicsimulation Implementing the VITAL Standard. Great Lakes Symposium on VLSI 1997: 51-
[c3]Norbert Fröhlich, Rolf Schlagenhaft, Josef Fleischmann: A New Approach for Partitioning VLSI Circuits on Transistor Level. Workshop on Parallel and Distributed Simulation 1997: 64-67
[c2]Norbert Fröhlich, Rolf Schlagenhaft, Andreas Ganz, Josef Fleischmann: Object Orientation in Time Warp Simulation. PDPTA 1997: 1015-1023- 1995
[c1]Josef Fleischmann, Philip A. Wilsey: Comparative analysis of periodic state saving techniques in time warp simulators. PADS 1995: 50-58
Coauthor Index
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last updated on 2012-12-02 22:16 CET by the dblp team



