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 | 2006 | |
|---|---|---|
| j2 |      | Mitsutoshi Yahara, Kuniaki Fujimoto, Hirofumi Sasaki, Takashi Shibuya, Yoshinori Higashi: All Digital Dividing Ratio Changeable PLL Using Delay Clock Pulse with Low Jitter. IEICE Transactions 89-A(6): 1527-1532 (2006) |
| c1 | | Kuniaki Fujimoto, Hirofumi Sasaki, Yoichiro Masaoka, Ren-Qi Yang, Masaharu Mizumoto: An Implementation of the Neuro-fuzzy Inference Circuit. ICICIC (2) 2006: 301-304 |
| 2005 | ||
| j1 | | Mitsutoshi Yahara, Kuniaki Fujimoto, Hirofumi Sasaki: A Voltage Controlled Oscillator with Up Mode Type Miller-Integrator. IEICE Transactions 88-C(12): 2385-2387 (2005) |
| 1 | Yoshinori Higashi | |
| 2 | Yoichiro Masaoka | |
| 3 | Masaharu Mizumoto | |
| 4 | Hirofumi Sasaki | |
| 5 | Takashi Shibuya | |
| 6 | Mitsutoshi Yahara | |
| 7 | Ren-Qi Yang |
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