Daniel Gajski

Jelena Trajkovic, Samar Abdi, Gabriela Nicolescu, Daniel D. Gajski: Automated Generation of Custom Processor Core from C Code. J. Electrical and Computer Engineering 2012 (2012)

Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, Daniel D. Gajski: Automatic TLM Generation for Early Validation of Multicore Systems. IEEE Design & Test of Computers 28(3): 10-19 (2011)

Daniel Gajski, Todd M. Austin, Steve Svoboda: What input-language is the best choice for high level synthesis (HLS)? DAC 2010: 857-858

Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski: Accurate timed RTOS model for transaction level modeling. DATE 2010: 1333-1336

Ines Viskic, Lochi Yu, Daniel Gajski: Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications. LCTES 2010: 77-84

Samar Abdi, Yonghyun Hwang, Lochi Yu, Hansu Cho, Ines Viskic, Daniel D. Gajski: Embedded system environment: A framework for TLM-based design and prototyping. International Symposium on Rapid System Prototyping 2010: 1-7

Jelena Trajkovic, Daniel D. Gajski: Early performance-cost estimation of application-specific data path pipelining. SASP 2010: 107-110

Philippe Coussy, Daniel D. Gajski, Michael Meredith, Andrés Takach: An Introduction to High-Level Synthesis. IEEE Design & Test of Computers 26(4): 8-17 (2009)

Samar Abdi, Daniel Gajski, Ines Viskic: Model Based Synthesis of Embedded Software. JSW 4(7): 717-727 (2009)

Andreas Gerstlauer, Christian Haubelt, Andy D. Pimentel, Todor Stefanov, Daniel D. Gajski, Jürgen Teich: Electronic System-Level Synthesis Methodologies. IEEE Trans. on CAD of Integrated Circuits and Systems 28(10): 1517-1530 (2009)

Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski: Hardware-dependent software synthesis for many-core embedded systems. ASP-DAC 2009: 304-310

Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski: System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Emb. Sys. 2008 (2008)

Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski: Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. TRETS 1(2) (2008)

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski: An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors. IEEE Trans. VLSI Syst. 16(4): 466-475 (2008)

Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski: C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). DAC 2008: 72-75

Bita Gorjiara, Daniel Gajski: Automatic architecture refinement techniques for customizing processing elements. DAC 2008: 379-384

Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, A. Nakamura, Dai Araki, Y. Nishihara: Specify-explore-refine (SER): from specification to implementation. DAC 2008: 586-591

Yonghyun Hwang, Samar Abdi, Daniel Gajski: Cycle-approximate Retargetable Performance Estimation at the Transaction Level. DATE 2008: 3-8

Jelena Trajkovic, Daniel D. Gajski: Custom Processor Core Construction from C Code. SASP 2008: 1-6

Daniel D. Gajski, Samar Abdi, Ines Viskic: Model Based Synthesis of Embedded Software. SEUS 2008: 21-33

Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski: Automatic Layer-Based Generation of System-On-Chip Bus Communication Models. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1676-1687 (2007)

Francine Bacchini, Daniel D. Gajski, Laurent Maillet-Contoz, Haruhisa Kashiwagi, Jack Donovan, Tommi Mäkeläinen, Jack Greenbaum, Rishiyur S. Nikhil: TLM: Crossing Over From Buzz To Adoption. DAC 2007: 444-445

Mehrdad Reshadi, Daniel Gajski: Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems. DATE 2007: 1337-1342

Daniel D. Gajski: New Strategies for System-Level Design. DDECS 2007: 15

Bita Gorjiara, Daniel Gajski: FPGA-friendly code compression for horizontal microcoded custom IPs. FPGA 2007: 108-115

Bita Gorjiara, Daniel Gajski: A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. ICCD 2007: 609-614

Jelena Trajkovic, Daniel Gajski: Automatic Data Path Generation from C code for Custom Processors. IESS 2007: 107-120

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski: An Interactive Design Environment for C-based High-Level Synthesis. IESS 2007: 135-144

Hansu Cho, Samar Abdi, Daniel Gajski: Interface synthesis for heterogeneous multi-core systems from transaction level models. LCTES 2007: 140-142

Ines Viskic, Samar Abdi, Daniel D. Gajski: Automatic generation of embedded communication SW for heterogeneous MPSoC platforms. LCTES 2007: 143-145

Samar Abdi, Daniel Gajski: Verification of System Level Model Transformations. International Journal of Parallel Programming 34(1): 29-59 (2006)

Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski: Designing a custom architecture for DCT using NISC technology. ASP-DAC 2006: 116-117

Hansu Cho, Samar Abdi, Daniel Gajski: Design and implementation of transducer for ARM-TMS communication. ASP-DAC 2006: 126-127

Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski: Automatic generation of transaction level models for rapid design space exploration. CODES+ISSS 2006: 64-69

Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski: Generic netlist representation for system and PE level design exploration. CODES+ISSS 2006: 282-287

Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski: A Graph Based Algorithm for Data Path Optimization in Custom Processors. DSD 2006: 496-503

Samar Abdi, Daniel Gajski: Transaction Routing and its Verification by Correct Model Transformations. HLDVT 2006: 129-136

Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski: Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . ICCD 2006

Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski: System-level communication modeling for network-on-chip synthesis. ASP-DAC 2005: 45-48

Samar Abdi, Daniel Gajski: A formalism for functionality preserving system level transformations. ASP-DAC 2005: 139-144

Lukai Cai, Andreas Gerstlauer, Daniel Gajski: Multi-metric and multi-entity characterization of applications for early system design exploration. ASP-DAC 2005: 944-947

Junyu Peng, Samar Abdi, Daniel Gajski: A clustering technique to optimize hardware/software synchronization. ASP-DAC 2005: 965-968

Mehrdad Reshadi, Daniel Gajski: A cycle-accurate compilation algorithm for custom pipelined datapaths. CODES+ISSS 2005: 21-26

Grant Martin, Daniel Gajski, David Goodwin, Patrick Lysaght, Peter Marwedel, Mike Muller, Jeff Welser: What will system level design be when it grows up? CODES+ISSS 2005: 123

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski: Automatic network generation for system-on-chip communication design. CODES+ISSS 2005: 255-260

Samar Abdi, Daniel D. Gajski: Functional Validation of System Level Static Scheduling. DATE 2005: 542-547

Shuqing Zhao, Daniel D. Gajski: Defining an Enhanced RTL Semantics. DATE 2005: 548-553

Bita Gorjiara, Daniel D. Gajski: Custom Processor Design Using NISC: A Case-Study on DCT algorithm. ESTImedia 2005: 55-60

Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski: Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. ICCD 2005: 69-76

Shuqing Zhao, Daniel D. Gajski: Structural operational semantics for supporting multi-cycle operations in RTL HDLs. MEMOCODE 2005: 45-53

Daniel Gajski: System design extreme makeover. MEMOCODE 2005: 71-75

Samar Abdi, Daniel Gajski: On deriving equivalent architecture model from system specification. ASP-DAC 2004: 322-327

Haobo Yu, Rainer Dömer, Daniel Gajski: Embedded software generation from system level design languages. ASP-DAC 2004: 463-468

Dongwan Shin, Samar Abdi, Daniel Gajski: Automatic generation of bus functional models from transaction level models. ASP-DAC 2004: 756-758

Lukai Cai, Haobo Yu, Daniel Gajski: A novel memory size model for variable-mapping in system level design. ASP-DAC 2004: 812-817

Peter Marwedel, Daniel Gajski, Erwin A. de Kock, Hugo De Man, Mariagiovanna Sami, Ingemar Söderquist: Embedded systems education: how to teach the required skills? CODES+ISSS 2004: 254-255

Lukai Cai, Andreas Gerstlauer, Daniel Gajski: Retargetable profiling for rapid, early system-level design space exploration. DAC 2004: 281-286

Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon: Were the good old days all that good?: EDA then and now. DAC 2004: 543

Samar Abdi, Daniel Gajski: Automatic generation of equivalent architecture model from functional specification. DAC 2004: 608-613

Samar Abdi, Daniel Gajski: Model validation for mapping specification behaviors to processing elements. HLDVT 2004: 101-106

Lukai Cai, Daniel Gajski: Transaction level modeling: an overview. CODES+ISSS 2003: 19-24

Haobo Yu, Andreas Gerstlauer, Daniel Gajski: RTOS scheduling in transaction level models. CODES+ISSS 2003: 31-36

Samar Abdi, Dongwan Shin, Daniel Gajski: Automatic communication refinement for system level design. DAC 2003: 300-305

Andreas Gerstlauer, Haobo Yu, Daniel Gajski: RTOS Modeling for System Level Design. DATE 2003: 10130-10135

Heinz-Joseph Schlebusch, Gary Smith, Donatella Sciuto, Daniel Gajski, Carsten Mielenz, Christopher K. Lennard, Frank Ghenassia, Stuart Swan, Joachim Kunkel: Transaction Based Design: Another Buzzword or the Solution to a Design Problem? DATE 2003: 10876-10879

Jianwen Zhu, Daniel D. Gajski: An ultra-fast instruction set simulator. IEEE Trans. VLSI Syst. 10(3): 363-373 (2002)

Lukai Cai, Daniel Gajski, Paul Kritzinger, Mike Olivarez: Top-Down System Level Design Methodology Using SpecC, VCC and SystemC. DATE 2002: 1137

Shuqing Zhao, Daniel Gajski: Modeling a new RTL semantics in C++. ISCAS (5) 2002: 741-744

Daniel Gajski, Junyu Peng: Optimal Message-Passing for Data Coherency in Distributed Architecture. ISSS 2002: 20-25

Daniel Gajski, Andreas Gerstlauer: System-Level Abstraction Semantics. ISSS 2002: 231-236

Junyu Peng, Samar Abdi, Daniel Gajski: Automatic Model Refinement for Fast Architecture Exploration. VLSI Design 2002: 332-337

Smita Bakshi, Daniel Gajski: Performance-constrained hierarchical pipelining for behaviors, loops, and operations. ACM Trans. Design Autom. Electr. Syst. 6(1): 1-25 (2001)

Jianwen Zhu, Daniel Gajski: Compiling SpecC for simulation. ASP-DAC 2001: 57-62

Rajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Gérard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont: Panel: The Next HDL: If C++ is the Answer, What was the Question? DAC 2001: 71-72

Daniel Gajski, Eugenio Villar, Wolfgang Rosenstiel, Vassilios Gerousis, D. Barton, J. Plantin, S. E. Ericsson, Patrizia Cavalloro, Gjalt G. de Jong: C/C++: progress or deadlock in system-level specification. DATE 2001: 136-137

Lukai Cai, Daniel Gajski, Mike Olivarez: Introduction of system level architecture exploration using the SpecC methodology. ISCAS (5) 2001: 9-12

Brian Bailey, Daniel Gajski: RTL semantics and methodology. ISSS 2001: 69-74

Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul, Shojiro Mori, Tom Nukiyama, Pierre Bricaud: Embedded tutorial: essential issues for IP reuse. ASP-DAC 2000: 37-42

Nong Fan, Viraphol Chaiyakul, Daniel Gajski: Usage-based characterization of complex functional blocks for reuse in behavioral synthesis. ASP-DAC 2000: 43-48

Rainer Dömer, Daniel Gajski: Reuse and protection of intellectual property in the SpecC system. ASP-DAC 2000: 49-54

Masaharu Imai, Gary Smith, Steven Schulz, Karen Bartleson, Daniel Gajski, Wolfgang Rosenstiel, Peter Flake, Hiroto Yasuura: One language or more?: how can we design an SoC at a system level? ASP-DAC 2000: 653-654

Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann: The Specification Language SpecC within the PARADISE Design Environment. DIPES 2000: 111-120

Smita Bakshi, Daniel D. Gajski: Partitioning and pipelining for performance-constrained hardware/software systems. IEEE Trans. VLSI Syst. 7(4): 419-432 (1999)

Jianwen Zhu, Daniel Gajski: A unified formal model of ISA and FSMD. CODES 1999: 121-125

Daniel Gajski: IP-based Design Methodology. DAC 1999: 43

Jianwen Zhu, Daniel Gajski: Soft Scheduling in High Level Synthesis. DAC 1999: 219-224

Jianwen Zhu, Daniel Gajski: OpenJ: An Extensible System Level Design Language. DATE 1999: 480-484

Dai Araki, Tadatoshi Ishii, Daniel Gajski: Rapid Prototyping with HW/SW Codesign Tool. ECBS 1999: 114-121

Daniel Gajski, Reinaldo A. Bergamaschi: Panel Statement. ISSS 1999: 8-9

Daniel D. Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong: SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design. IEEE Trans. VLSI Syst. 6(1): 84-100 (1998)

Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong: System-level exploration with SpecSyn. DAC 1998: 812-817

Smita Bakshi, Daniel D. Gajski: Hierarchical pipelining for behaviors, loops, and operations. ICCD 1998: 450-455

Daniel Gajski, Rainer Dömer, Jianwen Zhu: IP-Centric Methodology and Specification Language. DIPES 1998: 3-22

Jie Gong, Daniel Gajski, Smita Bakshi: Model refinement for hardware-software codesign. ACM Trans. Design Autom. Electr. Syst. 2(1): 22-41 (1997)

Youn-Sik Hong, Choong-Hee Cho, Daniel D. Gajski: A quantitative analysis for optimizing memory allocation. ASP-DAC 1997: 239-245

Smita Bakshi, Daniel Gajski: Hardware/Software Partitioning and Pipelining. DAC 1997: 713-716

Smita Bakshi, Daniel Gajski: A Scheduling and Pipelining Algorithm for Hardware/Software Systems. ISSS 1997: 113-

En-Shou Chang, Daniel Gajski, Sanjiv Narayan: An optimal clock period selection method based on slack minimization criteria. ACM Trans. Design Autom. Electr. Syst. 1(3): 352-370 (1996)

Daniel D. Gajski, Sanjiv Narayan, Loganath Ramachandran, Frank Vahid, Peter Fung: System design methodologies: aiming at the 100 h design cycle. IEEE Trans. VLSI Syst. 4(1): 70-82 (1996)

Smita Bakshi, Daniel D. Gajski: Component selection for high-performance pipelines. IEEE Trans. VLSI Syst. 4(2): 181-194 (1996)

Hsiao-Ping Juan, Daniel Gajski, Viraphol Chaiyakul: Clock-driven performance optimization in interactive behavioral synthesis. ICCAD 1996: 154-157

Rajesh K. Gupta, Daniel Gajski, Randy Allen, Yatin Trivedi: Opportunities and pitfalls in HDL-based system design. ICCD 1996: 56-

Daniel D. Gajski, Frank Vahid: Specification and Design of Embedded Hardware-Software Systems. IEEE Design & Test of Computers 12(1): 53-67 (1995)

Frank Vahid, Sanjiv Narayan, Daniel D. Gajski: SpecCharts: a VHDL front-end for embedded systems. IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 694-706 (1995)

Frank Vahid, Daniel D. Gajski: Incremental hardware estimation during hardware/software functional partitioning. IEEE Trans. VLSI Syst. 3(3): 459-464 (1995)

Jie Gong, Daniel D. Gajski, Alexandru Nicolau: Performance evaluation for application-specific architectures. IEEE Trans. VLSI Syst. 3(4): 483-490 (1995)

Sanjiv Narayan, Daniel Gajski: Interfacing Incompatible Protocols Using Interface Process Generation. DAC 1995: 468-473

Smita Bakshi, Daniel D. Gajski: A memory selection algorithm for high-performance pipelines. EURO-DAC 1995: 124-129

Frank Vahid, Daniel D. Gajski: Closeness metrics for system-level functional partitioning. EURO-DAC 1995: 328-333

Frank Vahid, Daniel D. Gajski: Clustering for improved system-level functional partitioning. ISSS 1995: 28-35

Daniel D. Gajski, Loganath Ramachandran: Introduction to High-Level Synthesis. IEEE Design & Test of Computers 11(4): 44-54 (1994)

Tsing-Fa Lee, Allen C.-H. Wu, Youn-Long Lin, Daniel D. Gajski: A transformation-based method for loop folding. IEEE Trans. on CAD of Integrated Circuits and Systems 13(4): 439-450 (1994)

Sanjiv Narayan, Daniel Gajski: Protocol Generation for Communication Channels. DAC 1994: 547-551

Jie Gong, Daniel D. Gajski, Alex Nicolau: A performance evaluator for parameterized ASIC architectures. EURO-DAC 1994: 66-71

Loganath Ramachandran, Daniel D. Gajski, Sanjiv Narayan, Frank Vahid, Peter Fung: 100-hour design cycle: a test case. EURO-DAC 1994: 144-149

Frank Vahid, Daniel D. Gajski, Jie Gong: A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning. EURO-DAC 1994: 214-219

Loganath Ramachandran, Daniel Gajski, Viraphol Chaiyakul: An Algorithm for Array Variable Clustering. EDAC-ETC-EUROASIC 1994: 262-266

Nancy D. Holmes, Daniel Gajski: An Algorithm for Generation of Behavioral Shape Functions. EDAC-ETC-EUROASIC 1994: 314-318

Sanjiv Narayan, Daniel Gajski: Synthesis of System-Level Bus Interfaces. EDAC-ETC-EUROASIC 1994: 395-399

Smita Bakshi, Daniel D. Gajski: A component selection algorithm for high-performance pipelines. EURO-DAC 1994: 400-405

Daniel Gajski, Frank Vahid, Sanjiv Narayan: A System-Design Methodology: Executable-Specification Refinement. EDAC-ETC-EUROASIC 1994: 458-463

Frank Vahid, Daniel D. Gajski, Sanjiv Narayan: A transformation for integrating VHDL behavioral specification with synthesis and software generation. EURO-DAC 1994: 552-557

Hsiao-Ping Juan, Viraphol Chaiyakul, Daniel D. Gajski: Condition graphs for high-quality behavioral synthesis. ICCAD 1994: 170-174

Smita Bakshi, Daniel D. Gajski: Design exploration for high-performance pipelines. ICCAD 1994: 312-316

Elke A. Rundensteiner, Daniel D. Gajski, Lubomir Bic: Component synthesis from functional descriptions. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1287-1299 (1993)

Viraphol Chaiyakul, Daniel Gajski, Loganath Ramachandran: High-Level Transformations for Minimizing Syntactic Variances. DAC 1993: 413-418

Sanjiv Narayan, Frank Vahid, Daniel D. Gajski: System Specification with the SpecCharts Language. IEEE Design & Test of Computers 9(4): 6-13 (1992)

Lawrence L. Larmore, Daniel D. Gajski, Allen C.-H. Wu: Layout placement for sliced architecture. IEEE Trans. on CAD of Integrated Circuits and Systems 11(1): 102-114 (1992)

Allen C.-H. Wu, Daniel D. Gajski: Partitioning algorithms for layout synthesis from register-transfer netlists. IEEE Trans. on CAD of Integrated Circuits and Systems 11(4): 453-463 (1992)

Frank Vahid, Daniel Gajski: Specification Partitioning for System Design. DAC 1992: 219-224

Elke A. Rundensteiner, Daniel Gajski: Functional Synthesis Using Area and Delay Optimization. DAC 1992: 291-296

Tsing-Fa Lee, Allen C.-H. Wu, Daniel Gajski, Youn-Long Lin: An effective methodology for functional pipelining. ICCAD 1992: 230-233

Allen C.-H. Wu, Tedd Hadley, Daniel Gajski: An efficient multi-view design model for real-time interactive synthesis. ICCAD 1992: 328-331

Champaka Ramachandran, Fadi J. Kurdahi, Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul: Accurate layout area and delay modeling for system level design. ICCAD 1992: 355-361

Daniel Gajski, Nikil D. Dutt: Benchmarking and the Art of Syntesis Tool Comparison. Synthesis for Control Dominated Circuits 1992: 439-453

Allen C.-H. Wu, Viraphol Chaiyakul, Daniel Gajski: Layout-Area Models for High-Level Synthesis. ICCAD 1991: 34-37

Loganath Ramachandran, Daniel Gajski: An Algorithm for Component Selection in Performance Optimized Scheduling. ICCAD 1991: 92-95

Sanjiv Narayan, Frank Vahid, Daniel Gajski: System Specification and Synthesis with the SpecCharts Language. ICCAD 1991: 266-269

Frank Vahid, Daniel Gajski: Obtaining Functionally Equivalent Simulations using VHDL and a Time-Shift Transformation. ICCAD 1991: 362-365

Nikil D. Dutt, Daniel D. Gajski: Design Synthesis and Silicon Compilation. IEEE Design & Test of Computers 7(6): 8-23 (1990)

Forrest Brewer, Daniel D. Gajski: Chippe: a system for constraint driven behavioral synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 9(7): 681-695 (1990)

Min-You Wu, Daniel Gajski: Hypertool: A Programming Aid for Message-Passing Systems. IEEE Trans. Parallel Distrib. Syst. 1(3): 330-343 (1990)

Nikil D. Dutt, Tedd Hadley, Daniel Gajski: An Intermediate Representation for Behavioral Synthesis. DAC 1990: 14-19

Gwo-Dong Chen, Daniel Gajski: An Intelligent Component Database for Behavioral Synthesis. DAC 1990: 150-155

Roni Potasman, Joseph Lis, Alexandru Nicolau, Daniel Gajski: Percolation Based Synthesis. DAC 1990: 444-449

Mehrdad Negahban, Daniel Gajski: Silicon compilation of switched: capacitor networks. EURO-DAC 1990: 164-168

Allen C.-H. Wu, Nels Vander Zanden, Daniel Gajski: A new algorithm for transistor sizing in CMOS circuits. EURO-DAC 1990: 589-593

Allen C.-H. Wu, Daniel Gajski: Partitioning Algorithms for Layout Synthesis from Register-Transfer Netlists. ICCAD 1990: 144-147

Elke A. Rundensteiner, Daniel Gajski, Lubomir Bic: The Component Sythesis Algorithm: Technology Mapping for Register Transfer Descriptions. ICCAD 1990: 208-211

Joseph Lis, Daniel Gajski: VHDL Synthesis Using Structured Modeling. DAC 1989: 606-609

Nikil D. Dutt, Daniel Gajski: Designer Controlled Behavioral Synthesis. DAC 1989: 754-757

Min-You Wu, Daniel Gajski: Hypertool: A Programming Aid for Multicomputers. ICPP (2) 1989: 15-18

Youn-Long Lin, Daniel D. Gajski: LES: a layout expert system. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 868-876 (1988)

Chidchanok Lursinsap, Daniel D. Gajski: A technique for pull-up transistor folding. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 887-896 (1988)

Min-You Wu, Daniel D. Gajski: A programming aid for hypercube architectures. The Journal of Supercomputing 2(3): 349-372 (1988)

Nels Vander Zanden, Daniel Gajski: MILO: A Microarchitecture and Logic Optimizer. DAC 1988: 403-408

Barry M. Pangrle, Daniel D. Gajski: Design Tools for Intelligent Silicon Compilation. IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1098-1112 (1987)

Forrest Brewer, Daniel Gajski: Knowledge Based Control in Micro-Architecture Design. DAC 1987: 203-209

Chidchanok Lursinsap, Daniel Gajski: Improving a PLA Area by Pull-Up Transistor Folding. DAC 1987: 608-614

Y.-L. S. Lin, Daniel Gajski: LES: A Layout Expert System. DAC 1987: 672-678

Min-You Wu, Daniel Gajski: A Programming Aid for Message-passing Systems. PPSC 1987: 328-332

Avinoam Bilgory, Daniel Gajski: A Heuristic for Suffix Solutions. IEEE Trans. Computers 35(1): 34-42 (1986)

Forrest Brewer, Daniel Gajski: An expert-system paradigm for design. DAC 1986: 62-68

Alex Orailoglu, Daniel Gajski: Flow graph representation. DAC 1986: 503-509

Jih-Kwon Peir, Daniel Gajski: CAMP: A Programming Aide for Multiprocessors. ICPP 1986: 475-482

Daniel Gajski, Jih-Kwon Peir: Essential Issues in Multiprocessor Systems. IEEE Computer 18(6): 9-27 (1985)

Daniel Gajski, Jih-Kwon Peir: Comparison of five multiprocessor systems. Parallel Computing 2(3): 265-282 (1985)

Steven T. Healey, Daniel D. Gajski: Decomposition of logic networks into silicon. DAC 1985: 162-168

Daniel D. Gajski, Ahmed Sameh, Kai Hwang (Eds.): 7th IEEE Symposium on Computer Arithmetic, ARITH 1985, Urbana, IL, USA, June 4-6, 1985. IEEE 1985

Utpal Banerjee, Daniel Gajski: Fast Execution of Loops with IF Statements. IEEE Trans. Computers 33(11): 1030-1033 (1984)

Won Kim, Daniel Gajski, David J. Kuck: A Parallel Pipelined Relational Query Processor. ACM Trans. Database Syst. 9(2): 214-242 (1984)

Daniel D. Gajski, Duncan H. Lawrie, David J. Kuck, Ahmed H. Sameh: Cedar. COMPCON 1984: 306-310

Daniel D. Gajski: Silicon compilers and expert systems for VLSI. DAC 1984: 86-87

Chidchanok Lursinsap, Daniel Gajski: Cell compilation with constraints. DAC 1984: 103-108

Vijay K. Raj, Barry M. Pangrle, Daniel D. Gajski: Microprocessor synthesis. DAC 1984: 676-678

Utpal Banerjee, Daniel Gajski: Fast Execution of Loops With IF Statements. ISCA 1984: 126-132

Daniel Gajski, Won Kim, Shinya Fushimi: A Parallel Pipelined Relational Query Processor: An Architectural Overview. ISCA 1984: 134-141

Daniel Gajski, Robert H. Kuhn: New VLSI Tools - Guest Editors' Introduction. IEEE Computer 16(12): 11-14 (1983)

Daniel Gajski, David J. Kuck, Duncan H. Lawrie, Ahmed H. Sameh: Cedar : A Large Scale Multiprocessor. ICPP 1983: 524-529

Daniel Gajski, David A. Padua, David J. Kuck, Robert H. Kuhn: A Second Opinion on Data Flow Machines and Languages. IEEE Computer 15(2): 58-69 (1982)

Daniel D. Gajski, Ahmed H. Sameh, J. A. Wisniewski: Iterative algorithms for tridiagonal matrices on a WSI-multiprocessor. ICPP 1982: 82-89

Daniel Gajski: An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines. IEEE Trans. Computers 30(3): 190-206 (1981)

Jacob A. Abraham, Daniel Gajski: Design of Testable Structures Defined by Simple Loops. IEEE Trans. Computers 30(11): 875-884 (1981)

Daniel Gajski: Recurrence semigroups and their relation to data storage in fast recurrence solvers on parallel machines. CONPAR 1981: 343-357

Avinoam Bilgory, Daniel D. Gajski: Automatic generation of cells for recurrence structures. DAC 1981: 306-313

Daniel Gajski: Parallel Compressors. IEEE Trans. Computers 29(5): 393-398 (1980)

Albert E. Casavant, Daniel D. Gajski, David J. Kuck: Automatic design with dependence graphs. DAC 1980: 506-515

Daniel D. Gajski, Louis P. Rubinfield: Design of arithmetic elements for Burroughs Scientific Processor. IEEE Symposium on Computer Arithmetic 1978: 245-256