| 2011 | ||
|---|---|---|
| c9 | Joseph B. Manzano, Ge Gan, Juergen Ributzka, Sunil Shrestha, Guang R. Gao: OPELL and PM: A Case Study on Porting Shared Memory Programming Models to Accelerators Architectures. LCPC 2011: 106-123 | |
| 2010 | ||
| c8 | Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao, Vivek Sarkar: A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures. Euro-Par (2) 2010: 341-352 | |
| 2009 | ||
| c7 | Ge Gan, Xu Wang, Joseph Manzano, Guang R. Gao: Tile Percolation: An OpenMP Tile Aware Parallelization Technique for the Cyclops-64 Multicore Processor. Euro-Par 2009: 839-850 | |
| c6 | Ge Gan, Xu Wang, Joseph Manzano, Guang R. Gao: Tile Reduction: The First Step towards Tile Aware Parallelization in OpenMP. IWOMP 2009: 140-153 | |
| c5 | Ge Gan, Joseph Manzano: TL-DAE: Thread-Level Decoupled Access/Execution for OpenMP on the Cyclops-64 Many-Core Processor. LCPC 2009: 80-94 | |
| c4 | Xu Wang, Ge Gan, Dongrui Fan, Shuxu Guo: GFFC: The Global Feedback Based Flow Control in the NoC Design for Many-core Processor. NPC 2009: 227-232 | |
| 2008 | ||
| c3 | Xu Wang, Ge Gan, Joseph Manzano, Dongrui Fan, Shuxu Guo: A Quantitative Study of the On-Chip Network and Memory Hierarchy Design for Many-Core Processor. ICPADS 2008: 689-696 | |
| 2007 | ||
| c2 | Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao: Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture. IPDPS 2007: 1-8 | |
| c1 | Joseph B. Manzano, Ziang Hu, Yi Jiang, Ge Gan, Hyo-Jung Song, Jung-Gyu Park: Toward an Automatic Code Layout Methodology. IWOMP 2007: 157-160 | |
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