Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Anne E. Gattiker
Anne Gattiker
2010 – today
- 2013
[c27]Thomas H. Osiecki, Min-yu Tsai, Anne E. Gattiker, Damir A. Jamsek, Sani R. Nassif, William Evan Speight, Cliff C. N. Sze: Hardware Acceleration of an Efficient and Accurate Proton Therapy Monte Carlo. ICCS 2013: 2241-2250
[c26]James D. Warnock, Yuen H. Chan, Hubert Harrer, David L. Rude, Ruchir Puri, Sean M. Carey, Gerard Salem, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, Adam Jatkowski, Gerald Strevig, Leon J. Sigal, Ayan Datta, Anne Gattiker, Aditya Bansal, Doug Malone, Thomas Strach, Huajun Wen, Pak-kin Mak, Chung-Lung Shum, Donald W. Plass, Charles F. Webb: 5.5GHz system z microprocessor and multi-chip module. ISSCC 2013: 46-47- 2012
[j8]Anne E. Gattiker, Phil Nigh: Guest Editors' Introduction: Yield Learning Processes and Methods. IEEE Design & Test of Computers 29(1): 6-7 (2012)
[c25]Eun Jung Jang, Anne Gattiker, Sani R. Nassif, Jacob A. Abraham: An oscillation-based test structure for timing information extraction. VTS 2012: 74-79- 2011
[c24]Eun Jung Jang, Jaeyong Chung, Anne E. Gattiker, Sani R. Nassif, Jacob A. Abraham: Post-Silicon Timing Validation Method Using Path Delay Measurements. Asian Test Symposium 2011: 232-237
[c23]
[c22]Eun Jung Jang, Anne E. Gattiker, Sani R. Nassif, Jacob A. Abraham: Efficient and product-representative timing model validation. VTS 2011: 90-95
[c21]Anne Gattiker: Invited paper: Yin and Yang of embedded sensors for post-scaling-era. VTS 2011: 324-327- 2010
[c20]Anne Gattiker: System-level impact of chip-level failure mechanisms and screens. ICCAD 2010: 173-176
2000 – 2009
- 2008
[c19]
[c18]- 2007
[j7]Anne Gattiker: Guest Editor's Introduction: Getting More Out of Test. IEEE Design & Test of Computers 24(5): 474-475 (2007)- 2006
[j6]
[j5]Kerry Bernstein, David J. Frank, Anne E. Gattiker, Wilfried Haensch, Brian L. Ji, Sani R. Nassif, Edward J. Nowak, Dale J. Pearson, Norman J. Rohrer: High-performance CMOS variability in the 65-nm regime and beyond. IBM Journal of Research and Development 50(4-5): 433-450 (2006)
[c17]Anne E. Gattiker: IC failure mechanisms yesterday, today, tomorrow: implications from test to DFM. ISPD 2006: 47
[c16]Anne Gattiker, Manjul Bhushan, Mark B. Ketchen: Data Analysis Techniques for CMOS Technology Characterization and Product Impact Assessment. ITC 2006: 1-10
[e1]Scott Davidson, Anne Gattiker (Eds.): 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006. IEEE 2006, ISBN 1-4244-0292-1- 2004
[c15]
[c14]Anne E. Gattiker: Diagnosis Meets Physical Failure Analysis: How Long can we Succeed? ITC 2004: 1441- 2003
[j4]James F. Plusquellic, Abhishek Singh, Chintan Patel, Anne E. Gattiker: Power supply transient signal analysis for defect-oriented test. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 370-374 (2003)
[c13]Wojciech Maly, Anne E. Gattiker, Thomas Zanon, Thomas J. Vogels, R. D. (Shawn) Blanton, Thomas M. Storey: Deformations of IC Structure in Test and Yield Learning. ITC 2003: 856-865- 2002
[j3]Pranab K. Nag, Anne E. Gattiker, Sichao Wei, Ronald D. Blanton, Wojciech Maly: Modeling the Economics of Testing: A DFT Perspective. IEEE Design & Test of Computers 19(1): 29-41 (2002)
[c12]Anne E. Gattiker, Sani R. Nassif, Rashmi Dinakar, Chris Long: Static timing analysis based circuit-limited-yield estimation. ISCAS (5) 2002: 81-84
[c11]Duane S. Boning, Joseph Panganiban, Karen Gonzalez-Valentin, Sani R. Nassif, Chandler McDowell, Anne E. Gattiker, Frank Liu: Test structures for delay variability. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 109
[c10]Abhishek Singh, Jim Plusquellic, Anne E. Gattiker: Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models. VTS 2002: 357-366- 2001
[c9]Anne E. Gattiker, Sani R. Nassif, Rashmi Dinakar, Chris Long: Timing Yield Estimation from Static Timing Analysis. ISQED 2001: 437-442
[c8]Abhishek Singh, Chintan Patel, Shirong Liao, James F. Plusquellic, Anne E. Gattiker: Detecting delay faults using power supply transient signal analysis. ITC 2001: 395-404- 2000
[c7]
1990 – 1999
- 1998
[c6]- 1997
[j2]
[c5]
[c4]Sichao Wei, Pranab K. Nag, Ronald D. Blanton, Anne E. Gattiker, Wojciech Maly: To DFT or Not to DFT? ITC 1997: 557-566
[c3]- 1996
[c2]- 1994
[j1]Wojciech Maly, Derek Feltham, Anne E. Gattiker, Mark D. Hobaugh, Kenneth Backus, Michael E. Thomas: Smart-Substrate Multichip-Module Systems. IEEE Design & Test of Computers 11(2): 64-73 (1994)
[c1]Anne E. Gattiker, Wojciech Maly: Feasibility Study of Smart Substrate Multichip Modules. ITC 1994: 41-49
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-06-06 20:14 CEST by the dblp team



