Pedro J. Gil

Daniel Gil-Tomas, Joaquin Gracia-Moran, J.-Carlos Baraza-Calvo, Luis J. Saiz-Adalid, Pedro J. Gil-Vicente: Studying the effects of intermittent faults on a microcontroller. Microelectronics Reliability 52(11): 2837-2846 (2012)

Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL 2012: 292-299

Jesus Friginal, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Towards benchmarking routing protocols in wireless mesh networks. Ad Hoc Networks 9(8): 1374-1388 (2011)

Jesus Friginal, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks. LADC 2011: 94-99

Jesus Friginal, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks. NCA 2011: 139-146

Jesus Friginal, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study. SRDS 2011: 85-90

Joaquin Gracia-Moran, Daniel Gil-Tomas, Luis J. Saiz-Adalid, Juan Carlos Baraza, Pedro J. Gil-Vicente: Experimental validation of a fault tolerant microcomputer system against intermittent faults. DSN 2010: 413-418

Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan Carlos Baraza, Luis J. Saiz-Adalid, Pedro J. Gil-Vicente: Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study. PRDC 2010: 11-18

Jesus Friginal, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Attack Injection to Support the Evaluation of Ad Hoc Networks. SRDS 2010: 21-29

Sara Blanc, Alberto Bonastre, Pedro J. Gil: Dependability assessment of by-wire control systems using fault injection. Journal of Systems Architecture - Embedded Systems Design 55(2): 102-113 (2009)

Juan Carlos Ruiz, David de Andrés, Pedro J. Gil: Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores. ETFA 2009: 1-8

David de Andrés, Juan Carlos Ruiz, Pedro J. Gil: Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores. LADC 2009: 49-56

David de Andrés, Jesus Friginal, Juan Carlos Ruiz, Pedro J. Gil: An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks. PRDC 2009: 228-233

David de Andrés, Juan Carlos Ruiz, Daniel Gil, Pedro J. Gil: Fault Emulation for Dependability Evaluation of VLSI Systems. IEEE Trans. VLSI Syst. 16(4): 422-431 (2008)

Juan Carlos Baraza, Joaquin Gracia, Sara Blanc, Daniel Gil, Pedro J. Gil: Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code. IEEE Trans. VLSI Syst. 16(6): 693-706 (2008)

Joaquin Gracia, Luis J. Saiz, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil: Analysis of the influence of intermittent faults in a microcontroller. DDECS 2008: 80-85

David de Andrés, Juan Carlos Ruiz, Daniel Gil, Pedro J. Gil: Dependability Assessment for the Selection of Embedded Cores. EDCC 2008: 79-84

Daniel Gil, Luis J. Saiz, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil: Injecting intermittent faults for the dependability validation of commercial microcontrollers. HLDVT 2008: 177-184

Juan Carlos Ruiz, David de Andrés, Sara Blanc, Pedro J. Gil: Generic Design and Automatic Deployment of NMR Strategies on HW Cores. PRDC 2008: 265-272

David de Andrés, Juan Carlos Ruiz, Daniel Gil, Pedro J. Gil: Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems. DSN 2006: 291-300

Juan Pardo, José Carlos Campelo, Juan Carlos Ruiz, Pedro J. Gil: Temporal Characterization of Embedded Systems Using Nexus. EDCC 2006: 47-52

David de Andrés, Juan Carlos Ruiz, Daniel Gil, Pedro J. Gil: Fast Emulation of Permanent Faults in VLSI Systems. FPL 2006: 1-6

David de Andrés, Juan Carlos Ruiz, Daniel Gil, Pedro J. Gil: FADES: a fault emulation tool for fast dependability assessment. FPT 2006: 221-228

David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil: Fast Run-Time Reconfiguration for SEU Injection. EDCC 2005: 230-245

Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil: Impact of Faults in Combinational Logic of Commercial Microcontrollers. EDCC 2005: 379-390

Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil: Improvement of fault injection techniques based on VHDL code modification. HLDVT 2005: 19-26

Juan Carlos Ruiz, José Carlos Campelo, Pedro J. Gil, Juan Pardo: On-chip Debugging-based Fault Emulation for Robustness Evaluation of Embedded Software Components. PRDC 2005: 57-64

Sara Blanc, Joaquin Gracia, Pedro J. Gil: Experiences during the Experimental Validation of the Time-Triggered Architecture. DATE 2004: 256-261

Juan-Carlos Ruiz-Garcia, Pedro Yuste, Pedro J. Gil, Lenin Lemus: On Benchmarking the Dependability of Automotive Engine Control Applications. DSN 2004: 857-866

Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil: Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques. HLDVT 2004: 173-178

Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil: Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system. Microelectronics Journal 34(1): 41-51 (2003)

Pedro Yuste, David de Andrés, Lenin Lemus, Juan José Serrano, Pedro J. Gil: INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems. DSN 2003: 669

Pedro Yuste, Juan-Carlos Ruiz-Garcia, Lenin Lemus, Pedro J. Gil: Non-intrusive Software-Implemented Fault Injection in Embedded Systems. LADC 2003: 23-38

Sara Blanc, Pedro J. Gil: Improving the Multiple Errors Detection Coverage in Distributed Embedded Systems. SRDS 2003: 303-

Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil: A prototype of a VHDL-based fault injection tool: description and application. Journal of Systems Architecture 47(10): 847-867 (2002)

Sara Blanc, Joaquin Gracia, Pedro J. Gil: A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques. DFT 2002: 254-262

Joaquin Gracia, Daniel Gil, Juan Carlos Baraza, Pedro J. Gil: Using VHDL-Based Fault Injection to exercise Error Detection Mechanisms in the Time-Triggered Architecture. PRDC 2002: 316-320

Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil: Comparison and Application of Different VHDL-Based Fault Injection Techniques. DFT 2001: 233-241

Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil: A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques. IOLTW 2001: 140

José V. Busquets-Mataix, Daniel Gil, Pedro J. Gil, Andy J. Wellings: Techniques to increase the schedulable utilization of cache-based preemptive real-time systems. Journal of Systems Architecture 46(4): 357-378 (2000)

Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil: A Prototype of a VHDL-Based Fault Injection Tool. DFT 2000: 396-404

Lenin Lemus, David de Andrés, Pedro J. Gil: An alternative to unify performance and reliability analysis of industrial applications. ESM 2000: 326-330

Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil: A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System. IOLTW 2000: 73-79

José Carlos Campelo, Francisco Rodríguez, Alicia Rubio, Rafael Ors, Pedro J. Gil, Lenin Lemus, J. V. Busquets, José Albaladejo, Juan José Serrano: Distributed industrial control systems: a fault-tolerant architecture. Microprocessors and Microsystems - Embedded Hardware Design 23(2): 103-112 (1999)

Daniel Gil, R. Martínez, J. V. Busquets, Juan Carlos Baraza, Pedro J. Gil: Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System. EDCC 1999: 191-208

José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano: Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems. IPPS/SPDP Workshops 1999: 384-388

José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano: Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems. SAFECOMP 1999: 202-215

José Carlos Campelo, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano: Design and Validation of a Distributed Industrial Control System's Nodes. SRDS 1999: 300-301

Daniel Gil, Juan Carlos Baraza, J. V. Busquets, Pedro J. Gil: Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System. EUROMICRO 1998: 10418-10425

Vicente Santonja, Marina Alonso, Xavier Molero, Juan José Serrano, Pedro J. Gil, Rafael Ors: Dependability Models of RAID Using Stochastic Activity Networks. EDCC 1996: 141-158

José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings: Adding instruction cache effect to schedulability analysis of preemptive real-time systems. IEEE Real Time Technology and Applications Symposium 1996: 204-

José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings: Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems. RTCSA 1996: 195-202