C. John Glossner

Murugappan Senthilvelan, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner: Instruction Set Extensions for Matrix Decompositions on Software Defined Radio Architectures. Signal Processing Systems 70(3): 289-303 (2013)

Christipher D. Jenkins, Michael J. Schulte, John Glossner: Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform. IJHPSA 2(3/4): 203-214 (2010)

John Glossner: Special session on software defined radio (SDR) and Cognitive Radio (CR). ICSAMOS 2010: 292

Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner: CORDIC-based LMMSE equalizer for Software Defined Radio. ICSAMOS 2010: 301-308

Daniel Iancu, John Glossner, Mihai Sima, Peter Farkas, Michael McGuire: Software-Defined Radio and Broadcasting. Int. J. Digital Multimedia Broadcasting 2009 (2009)

Vasile Surducan, Mayan Moudgill, Gary Nacer, Emanoil Surducan, Pablo I. Balzola, John Glossner, Stuart Stanley, Meng Yu, Daniel Iancu: The Sandblaster Software-Defined Radio Platform for Mobile 4G Wireless Communications. Int. J. Digital Multimedia Broadcasting 2009 (2009)

Emanoil Surducan, Vasile Surducan, Daniel Iancu, John Glossner: Multiband Antennas for SDR Applications. Int. J. Digital Multimedia Broadcasting 2009 (2009)

Suman Mamidi, Emily R. Blem, Michael J. Schulte, John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar: Instruction set extensions for software defined radio. Microprocessors and Microsystems - Embedded Hardware Design 33(4): 260-272 (2009)

Holger Blume, Georgi Gaydadjiev, John Glossner: Introduction to the Special Issue on SAMOS 2007. Signal Processing Systems 57(1): 1-3 (2009)

Mayan Moudgill, Vitaly Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Tak-po Li, Pablo I. Balzola, John Glossner: Synchronization on heterogeneous multiprocessor systems. ICSAMOS 2009: 133-139

John Glossner, Daniel Iancu, Mayan Moudgill, Sanjay Jinturkar, Gary Nacer, Stuart Stanley, Andrei Iancu, Hua Ye, Michael J. Schulte, Mihai Sima, Tomas Palenik, Peter Farkas, Jarmo Takala: Implementing communications systems on an SDR SoC. ICASSP 2008: 5380-5383

Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala: Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set. SAMOS 2008: 126-135

John Glossner, Daniel Iancu, Mayan Moudgill, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael J. Schulte: The Sandbridge SB3011 Platform. EURASIP J. Emb. Sys. 2007 (2007)

Timo D. Hämäläinen, Stephan Wong, John Glossner, Stamatis Vassiliadis: Editorial. Journal of Systems Architecture 53(10): 677-678 (2007)

Suman Mamidi, Michael J. Schulte, Daniel Iancu, C. John Glossner: Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems. ASAP 2007: 320-327

Sharad Singhai, MingYung Ko, Sanjay Jinturkar, Mayan Moudgill, John Glossner: An integrated ARM and multi-core DSP simulator. CASES 2007: 33-37

Vaidyanathan Ramadurai, Sanjay Jinturkar, Mayan Moudgill, C. John Glossner: Design and Implementation of a Multithreaded High Resolution MPEG4 Decoder on Sandblaster DSP. ESTImedia 2007: 73-76

John Glossner, Daniel Iancu, Mayan Moudgill, Michael J. Schulte, Stamatis Vassiliadis: Trends in Low Power Handset Software Defined Radio. SAMOS 2007: 313-321

Mihai Sima, Murugappan Senthilvelan, Daniel Iancu, C. John Glossner, Mayan Moudgill, Michael J. Schulte: Software Solutions for Converting a MIMO-OFDM Channel into Multiple SISO-OFDM Channels. WiMob 2007: 9

Holger Blume, Georgi Gaydadjiev, C. John Glossner, Peter M. W. Knijnenburg (Eds.): Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2007), Samos, Greece, July 16-19, 2007. IEEE 2007, isbn 1-4244-1058-4

Michael J. Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis: A Low-Power Multithreaded Processor for Software Defined Radio. VLSI Signal Processing 43(2-3): 143-159 (2006)

Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala: Software Implementation of WiMAX on the Sandbridge SandBlaster Platform. SAMOS 2006: 435-446

Georgi Gaydadjiev, C. John Glossner, Jarmo Takala, Stamatis Vassiliadis (Eds.): Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006. IEEE 2006, isbn 1-4244-0155-0

Suman Mamidi, Daniel Iancu, Andrei Iancu, Michael J. Schulte, John Glossner: Instruction Set Extensions for Reed-Solomon Encoding and Decoding. ASAP 2005: 364-369

Suman Mamidi, Emily R. Blem, Michael J. Schulte, C. John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar: Instruction set extensions for software defined radio on a multithreaded processor. CASES 2005: 266-273

C. John Glossner, Mayan Moudgill, Daniel Iancu, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael Samori, Tanuj Raja, Michael J. Schulte, Stamatis Vassiliadis: Future wireless convergence platforms. CODES+ISSS 2005: 7-12

Janos Sztipanovits, C. John Glossner, Trevor N. Mudge, Chris Rowen, Alberto L. Sangiovanni-Vincentelli, Wayne Wolf, Feng Zhao: Grand challenges in embedded systems. CODES+ISSS 2005: 333

Vaidyanathan Ramadurai, Sanjay Jinturkar, Mayan Moudgill, John Glossner: Implementation of H.264 decoder on Sandblaster DSP. ICME 2005: 694-698

Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane: CORDIC-Augmented Sandbridge Processor for Channel Equalization. SAMOS 2005: 152-161

C. John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael J. Schulte, Stamatis Vassiliadis: Sandbridge Software Tools. SAMOS 2005: 269-278

Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis: A Low-Power Carry Skip Adder with Fast Saturation. ASAP 2004: 269-279

Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis: A Static Low-Power, High-Performance 32-bit Carry Skip Adder. DSD 2004: 615-619

Shankar Krithivasan, Michael J. Schulte, John Glossner: A Subword-Parallel Multiplication and Sum-of-Squares Unit. ISVLSI 2004: 273-274

Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis: A Low-Power Multithreaded Processor for Baseband Communication Systems. SAMOS 2004: 393-402

Michael J. Schulte, Louis Marquette, Shankar Krithivasan, E. George Walters III, John Glossner: Combined Multiplication and Sum-of-Squares Units. ASAP 2003: 204-214

C. John Glossner, Michael J. Schulte, Stamatis Vassiliadis: A Java-Enabled DSP. Embedded Processor Design Challenges 2002: 307-326

Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C. John Glossner, Erdem Hokenek: Design Alternatives for Parallel Saturating Multioperand Adders. ICCD 2001: 172-177

Michael J. Schulte, Pablo I. Balzola, Jie Ruan, C. John Glossner: Parallel saturating multioperand adders. CASES 2000: 172-179

Dean Batten, Sanjay Jinturkar, C. John Glossner, Michael J. Schulte, Paul D'Arcy: A New Approach to DSP Intrinsic Functions. HICSS 2000

Dale E. Parson, Paul Beatty, John Glossner, Bryan Schlieder: A Framework for Simulating Heterogeneous Virtual Processors. Annual Simulation Symposium 1999: 58-

C. John Glossner, Stamatis Vassiliadis: Delft-Java Dynamic Translation. EUROMICRO 1999: 1057-1062

Navindra Yadav, Michael J. Schulte, John Glossner: Parallel Saturating Fractional Arithmetic Units. Great Lakes Symposium on VLSI 1999: 214-217

C. John Glossner, Jesse Thilo, Stamatis Vassiliadis: Java signal processing: FFTs with bytecodes. Concurrency - Practice and Experience 10(11-13): 1173-1178 (1998)

C. John Glossner, Stamatis Vassiliadis: DELFT-JAVA Link Translation Buffer. EUROMICRO 1998: 10221-

C. John Glossner, Stamatis Vassiliadis: The Delft-Java Engine: An Introduction. Euro-Par 1997: 766-770

Gerald G. Pechanek, M. Stojancic, Stamatis Vassiliadis, C. John Glossner: MFAST: a single chip highly parallel image processing architecture. ICIP 1995: 69-72