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Antonio González
Other persons with the same name
- Antonio González 0002 — University College London
2010 – today
- 2013
[j86]Enrique Leyva, Antonio González, Raúl Pérez: Knowledge-based instance selection: A compromise between efficiency and versatility. Knowl.-Based Syst. 47: 65-76 (2013)- [j85]Javier Lira, Carlos Molina, Ryan N. Rakvic, Antonio González: Replacement techniques for dynamic NUCA cache designs on CMPs. The Journal of Supercomputing 64(2): 548-579 (2013)
- [c178]Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert, Antonio González: Performance analysis and predictability of the software layer in dynamic binary translators/optimizers. Conf. Computing Frontiers 2013: 15
- [c177]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: Effectiveness of hybrid recovery techniques on parametric failures. ISQED 2013: 258-264
- 2012
- [j84]Abhishek Deb, Josep M. Codina, Antonio González: A HW/SW Co-designed Programmable Functional Unit. Computer Architecture Letters 11(1): 9-12 (2012)
- [j83]Cecilio Angulo, Joan Cabestany, Pablo Rodríguez, Montserrat Batlle, Antonio González, Sergio de Campos: Fuzzy expert system for the detection of episodes of poor water quality through continuous measurement. Expert Syst. Appl. 39(1): 1011-1020 (2012)
- [j82]Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González: Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. Integration 45(3): 246-252 (2012)
- [j81]Javier Lira, Timothy M. Jones, Carlos Molina, Antonio González: The migration prefetcher: Anticipating data promotion in dynamic NUCA caches. TACO 8(4): 45 (2012)
- [c176]Rakesh Kumar, Alejandro Martínez, Antonio González: Speculative dynamic vectorization for HW/SW co-designed processors. PACT 2012: 459-460
- [c175]Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio: A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance. ICCD 2012: 472-477
- [c174]Govind Sreekar Shenoy, Jordi Tubella, Antonio González: Hardware/Software Mechanisms for Protecting an IDS against Algorithmic Complexity Attacks. IPDPS Workshops 2012: 1190-1196
- [c173]Gaurang Upasani, Xavier Vera, Antonio González: Setting an error detection infrastructure with low cost acoustic wave detectors. ISCA 2012: 333-343
- [c172]Govind Sreekar Shenoy, Jordi Tubella, Antonio González: Exploiting temporal locality in network traffic using commodity multi-cores. ISPASS 2012: 110-111
- [c171]Govind Sreekar Shenoy, Jordi Tubella, Antonio González: Improving the Performance Efficiency of an IDS by Exploiting Temporal Locality in Network Traffic. MASCOTS 2012: 439-448
- [c170]Govind Sreekar Shenoy, Jordi Tubella, Antonio González: Improving the Resilience of an IDS against Performance Throttling Attacks. SecureComm 2012: 167-184
- [c169]Demos Pavlou, Enric Gibert, Fernando Latorre, Antonio González: DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. VEE 2012: 159-168
- 2011
- [j80]Yoel Caises, Antonio González, Enrique Leyva, Raúl Pérez: Combining instance selection methods based on data characterization: An approach to increase their effectiveness. Inf. Sci. 181(20): 4780-4798 (2011)
- [j79]Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera: TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies. Procedia CS 7: 148-149 (2011)
- [j78]Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González: Implementing End-to-End Register Data-Flow Continuous Self-Test. IEEE Trans. Computers 60(8): 1194-1206 (2011)
- [j77]Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González: CROB: Implementing a Large Instruction Window through Compression. T. HiPEAC 3: 115-134 (2011)
- [j76]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González: Compiler Directed Issue Queue Energy Reduction. T. HiPEAC 4: 42-62 (2011)
- [c168]Abhishek Deb, Josep M. Codina, Antonio González: A Co-designed HW/SW Approach to General Purpose Program Acceleration Using a Programmable Functional Unit. Interaction between Compilers and Computer Architectures 2011: 1-8
- [c167]Javier Lira, Timothy M. Jones, Carlos Molina, Antonio González: Beforehand Migration on D-NUCA Caches. PACT 2011: 197-198
- [c166]Abhishek Deb, Josep M. Codina, Antonio González: SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion. Conf. Computing Frontiers 2011: 1
- [c165]Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González: Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. ACM Great Lakes Symposium on VLSI 2011: 277-282
- [c164]Javier Lira, Carlos Molina, David Brooks, Antonio González: Implementing a hybrid SRAM / eDRAM NUCA architecture. HiPC 2011: 1-10
- [c163]
- [c162]Rakesh Ranjan, Fernando Latorre, Pedro Marcuello, Antonio González: Fg-STP: Fine-Grain Single Thread Partitioning on Multicores. HPCA 2011: 15-24
- [c161]Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González: Hardware/software-based diagnosis of load-store queues using expandable activity logs. HPCA 2011: 321-331
- [c160]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: Dynamic fine-grain body biasing of caches with latency and leakage 3T1D-based monitors. ICCD 2011: 332-338
- [c159]Nivard Aymerich, A. Asenov, A. Brown, Ramon Canal, B. Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, I. Vatajelu, Xavier Vera, X. Wang, Paul Zuber: New reliability mechanisms in memory design for sub-22nm technologies. IOLTS 2011: 111-114
- [c158]Govind Sreekar Shenoy, Jordi Tubella, Antonio González: A Performance and Area Efficient Architecture for Intrusion Detection Systems. IPDPS 2011: 301-310
- [c157]Javier Lira, Carlos Molina, Antonio González: HK-NUCA: Boosting Data Searches in Dynamic Non-Uniform Cache Architectures for Chip Multiprocessors. IPDPS 2011: 419-430
- [c156]Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González: Thread shuffling: combining DVFS and thread migration toreduce energy consumptions for multi-core systems. ISLPED 2011: 379-384
- [c155]Indu Bhagat, Enric Gibert, F. Jesús Sánchez, Antonio González: Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations. LCTES 2011: 161-170
- [c154]Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Xavier Vera, Antonio González: Accelerating microprocessor silicon validation by exposing ISA diversity. MICRO 2011: 386-397
- [c153]Abhishek Deb, Josep M. Codina, Antonio González: A Power-Efficient Co-designed Out-of-Order Processor. SBAC-PAD 2011: 1-8
- [c152]Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González: Design of complex circuits using the Via-Configurable transistor array regular layout fabric. SoCC 2011: 166-169
- [e2]
- 2010
- [b1]Antonio González, Fernando Latorre, Grigorios Magklis: Processor Microarchitecture: An Implementation Perspective. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2010
- [j75]Ryan Rakvic, José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Antonio González: Energy efficiency via thread fusion and value reuse. IET Computers & Digital Techniques 4(2): 114-125 (2010)
- [j74]Ryan Rakvic, Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González: Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors. TACO 7(2) (2010)
- [j73]Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum. IEEE Trans. Computers 59(12): 1598-1610 (2010)
- [c151]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability. DATE 2010: 417-422
- [c150]Luis A. Castillo, Juan Fernández-Olivares, Antonio González, Gonzalo Milla, David Prior, Lluvia Morales, José Figueroa, Víctor Pérez-Villar: A Knowledge Engineering Methodology for Rapid Prototyping of Planning Applications. FLAIRS Conference 2010
- [c149]Yoel Caises, Enrique Leyva, Antonio González, Raúl Pérez: A genetic learning of fuzzy relational rules. FUZZ-IEEE 2010: 1-8
- [c148]Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González: High-Performance low-vcc in-order core. HPCA 2010: 1-11
- [c147]Javier Lira, Carlos Molina, Antonio González: The auction: optimizing banks usage in Non-Uniform Cache Architectures. ICS 2010: 37-47
- [c146]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: MODEST: a model for energy estimation under spatio-temporal variability. ISLPED 2010: 129-134
- [c145]Nikos Foutris, Mihalis Psarakis, Dimitris Gizopoulos, Andreas Apostolakis, Xavier Vera, Antonio González: MT-SBST: Self-test optimization in multithreaded multicore architectures. ITC 2010: 734-743
- [c144]Marc Lupon, Grigorios Magklis, Antonio González: A Dynamically Adaptable Hardware Transactional Memory. MICRO 2010: 27-38
- [c143]Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González: VCTA: A Via-Configurable Transistor Array regular fabric. VLSI-SoC 2010: 335-340
2000 – 2009
- 2009
- [j72]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin: Exploring the limits of early register release: Exploiting compiler analysis. TACO 6(3) (2009)
- [j71]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin: Energy-efficient register caching with compiler assistance. TACO 6(4) (2009)
- [j70]Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli: AGAMOS: A Graph-Based Approach to Modulo Scheduling for Clustered Microarchitectures. IEEE Trans. Computers 58(6): 770-783 (2009)
- [j69]Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González: Reducing Soft Errors through Operand Width Aware Policies. IEEE Trans. Dependable Sec. Comput. 6(3): 217-230 (2009)
- [j68]Xavier Vera, Jaume Abella, Javier Carretero, Antonio González: Selective replication: A lightweight technique for soft errors. ACM Trans. Comput. Syst. 27(4) (2009)
- [c142]Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT 2009: 15-25
- [c141]Marc Lupon, Grigorios Magklis, Antonio González: FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery. PACT 2009: 293-302
- [c140]
- [c139]Javier Lira, Carlos Molina, Antonio González: Last Bank: Dealing with Address Reuse in Non-Uniform Cache Architecture for CMPs. Euro-Par 2009: 297-308
- [c138]Rakesh Ranjan, Pedro Marcuello, Fernando Latorre, Antonio González: P-slice based efficient speculative multithreading. HiPC 2009: 119-128
- [c137]Javier Lira, Carlos Molina, Antonio González: LRU-PEA: A smart replacement policy for non-uniform cache architectures on chip multiprocessors. ICCD 2009: 275-281
- [c136]Matteo Monchiero, Ramon Canal, Antonio González: Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPs. ICPP 2009: 1-8
- [c135]Yoel Caises, Antonio González, Enrique Leyva, Raúl Pérez: SCIS: Combining Instance Selection Methods to Increase Their Effectiveness over a Wide Range of Domains. IDEAL 2009: 17-24
- [c134]Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González: Online error detection and correction of erratic bits in register files. IOLTS 2009: 81-86
- [c133]Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González: End-to-end register data-flow continuous self-test. ISCA 2009: 105-115
- [c132]Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA 2009: 474-483
- [c131]Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González: Low Vccmin fault-tolerant cache with highly predictable performance. MICRO 2009: 111-121
- 2008
- [j67]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González, James W. Tschanz: Refueling: Preventing Wire Degradation due to Electromigration. IEEE Micro 28(6): 37-46 (2008)
- [j66]Rafael Muñoz-Salinas, Eugenio Aguirre, Miguel García-Silvente, Antonio González: A multiple object tracking approach that combines colour and depth information using a confidence measure. Pattern Recognition Letters 29(10): 1504-1514 (2008)
- [j65]Matteo Monchiero, Ramon Canal, Antonio González: Power/Performance/Thermal Design-Space Exploration for Multicore Architectures. IEEE Trans. Parallel Distrib. Syst. 19(5): 666-681 (2008)
- [j64]Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen, Hong Wang, John Paul Shen: Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices. IEEE Trans. Parallel Distrib. Syst. 19(7): 914-925 (2008)
- [c130]Qiong Cai, José González, Ryan Rakvic, Grigorios Magklis, Pedro Chaparro, Antonio González: Meeting points: using thread criticality to adapt multicore hardware to parallel regions. PACT 2008: 240-249
- [c129]Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González: On-Line Failure Detection and Confinement in Caches. IOLTS 2008: 3-9
- [c128]Qiong Cai, Josep M. Codina, José González, Antonio González: A software-hardware hybrid steering mechanism for clustered microarchitectures. IPDPS 2008: 1-12
- [c127]Fernando Latorre, José González, Antonio González: Efficient resources assignment schemes for clustered multithreaded processors. IPDPS 2008: 1-12
- [c126]José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Ryan Rakvic, Antonio González: Thread fusion. ISLPED 2008: 363-368
- 2007
- [j63]Marc de la Asunción, Luis A. Castillo, Juan Fernández-Olivares, Óscar García-Pérez, Antonio González, Francisco Palao: Handling fuzzy temporal constraints in a planning environment. Annals OR 155(1): 391-415 (2007)
- [j62]Ronny Ronen, Antonio González: Guest Editors' Introduction: Micro's Top Picks from the Microarchitecture Conferences. IEEE Micro 27(1): 8-11 (2007)
- [j61]Antonio González, Scott A. Mahlke, Shubu Mukherjee, Resit Sendag, Derek Chiou, Joshua J. Yi: Reliability: Fallacy or Reality? IEEE Micro 27(6): 36-45 (2007)
- [j60]Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González: Understanding the Thermal Implications of Multi-Core Architectures. IEEE Trans. Parallel Distrib. Syst. 18(8): 1055-1065 (2007)
- [c125]Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Early Register Release for Out-of-Order Processors with RegisterWindows. PACT 2007: 225-234
- [c124]Josep M. Codina, F. Jesús Sánchez, Antonio González: Virtual Cluster Scheduling Through the Scheduling Graph. CGO 2007: 89-101
- [c123]Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Heterogeneous Clustered VLIW Microarchitectures. CGO 2007: 354-366
- [c122]Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Improving Branch Prediction and Predicated Execution in Out-of-Order Processors. HPCA 2007: 75-84
- [c121]Antonio González, Nicolás Marín, Olga Pons, María Amparo Vila Miranda: Qualification of Fuzzy Statements Under Fuzzy Certainty. IFSA (1) 2007: 162-170
- [c120]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González: Fuse: A Technique to Anticipate Failures due to Degradation in ALUs. IOLTS 2007: 15-22
- [c119]
- 2006
- [j59]Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González: Exploiting Narrow Values for Soft Error Tolerance. Computer Architecture Letters 5(2) (2006)
- [j58]Enric Gibert, F. Jesús Sánchez, Antonio González: Instruction scheduling for a clustered VLIW processor with a word-interleaved cache. Concurrency and Computation: Practice and Experience 18(11): 1391-1411 (2006)
- [j57]Alex Settle, Dan Connors, Enric Gibert, Antonio González: A dynamically reconfigurable cache for multithreaded processors. J. Embedded Computing 2(2): 221-233 (2006)
- [j56]Osman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin: Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006)
- [j55]Juan L. Aragón, José M. González, Antonio González: Control Speculation for Energy-Efficient Next-Generation Superscalar Processors. IEEE Trans. Computers 55(3): 281-291 (2006)
- [c118]Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González: Selective predicate prediction for out-of-order processors. ICS 2006: 46-54
- [c117]Matteo Monchiero, Ramon Canal, Antonio González: Design space exploration for multicore architectures: a power/performance/thermal view. ICS 2006: 177-186
- [c116]
- [c115]Jaume Abella, Antonio González: SAMIE-LSQ: set-associative multiple-instruction entry load/store queue. IPDPS 2006
- [c114]Osman S. Unsal, Oguz Ergin, Xavier Vera, Antonio González: Empowering a helper cluster through data-width aware instruction selection policies. IPDPS 2006
- [c113]Grigorios Magklis, Pedro Chaparro, José González, Antonio González: Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture. ISLPED 2006: 49-54
- [c112]Rafael Muñoz-Salinas, Eugenio Aguirre, Miguel García-Silvente, Antonio González: Un Sistema Visual Difuso para la Detección de Interés en la Interacción Robot-Persona. Workshop de Agentes Físicos 2006: 49-56
- 2005
- [j54]Marc de la Asunción, Luis A. Castillo, Juan Fernández-Olivares, Óscar García-Pérez, Antonio González, Francisco Palao: SIADEX: An interactive knowledge-based planner for decision support in forest fire fighting. AI Commun. 18(4): 257-268 (2005)
- [j53]Rafael Alcalá, Jorge Casillas, Oscar Cordón, Antonio González, Francisco Herrera: A genetic rule weighting and selection process for fuzzy control of heating, ventilating and air conditioning systems. Eng. Appl. of AI 18(3): 279-296 (2005)
- [j52]Teresa Monreal, Víctor Viñals, Antonio González, Mateo Valero: Hardware support for early register release. IJHPCN 3(2/3): 83-94 (2005)
- [j51]Alex Pajuelo, Antonio González, Mateo Valero: Speculative execution for hiding memory latency. SIGARCH Computer Architecture News 33(3): 49-56 (2005)
- [j50]Jaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle: IATAC: a smart predictor to turn-off L2 cache lines. TACO 2(1): 55-77 (2005)
- [j49]Enric Gibert, F. Jesús Sánchez, Antonio González: Distributed Data Cache Designs for Clustered VLIW Processors. IEEE Trans. Computers 54(10): 1227-1241 (2005)
- [j48]Xavier Vera, Jaume Abella, Josep Llosa, Antonio González: An accurate cost model for guiding data locality transformations. ACM Trans. Program. Lang. Syst. 27(5): 946-987 (2005)
- [j47]Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio González, José Duato: On-Chip Interconnects and Instruction Steering Schemes for Clustered Microarchitectures. IEEE Trans. Parallel Distrib. Syst. 16(2): 130-144 (2005)
- [c111]Carlos Molina, Antonio González, Jordi Tubella: Compiler analysis for trace-level speculative multithreaded architectures. Interaction between Compilers and Computer Architectures 2005: 2-10
- [c110]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin: Compiler Directed Early Register Release. IEEE PACT 2005: 110-122
- [c109]Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González: Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217
- [c108]Ramon Canal, Antonio González, James E. Smith: Value Compression for Efficient Computation. Euro-Par 2005: 519-529
- [c107]Pedro Chaparro, Grigorios Magklis, José González, Antonio González: Distributing the Frontend for Temperature Reduction. HPCA 2005: 61-70
- [c106]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González: Software Directed Issue Queue Power Reduction. HPCA 2005: 144-153
- [c105]Stefan Bieschewski, Joan-Manuel Parcerisa, Antonio González: Memory Bank Predictors. ICCD 2005: 666-670
- [c104]Jaume Abella, Antonio González: Inherently Workload-Balanced Clustered Microarchitecture. IPDPS 2005
- [c103]Alex Pajuelo, Antonio González, Mateo Valero: Control-Flow Independence Reuse via Dynamic Vectorization. IPDPS 2005
- [c102]Carlos Molina, Jordi Tubella, Antonio González: Reducing Misspeculation Penalty in Trace-Level Speculative Multithreaded Architectures. ISHPC 2005: 43-55
- [c101]Rafael Muñoz-Salinas, Eugenio Aguirre, Miguel García-Silvente, Antonio González: People Detection and Tracking Through Stereo Vision for Human-Robot Interaction. MICAI 2005: 337-346
- [c100]Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González: The Mitosis Speculative Multithreaded Architectures. PARCO 2005: 27-40
- [c99]Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Demystifying on-the-fly spill code. PLDI 2005: 180-189
- [c98]Carlos García Quiñones, Carlos Madriles, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen: Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices. PLDI 2005: 269-279
- 2004
- [j46]Eugenio Aguirre, José F. Argudo, Antonio González, Raúl Pérez: A fuzzy perceptual model for map building and navigation of mobile robots. Integrated Computer-Aided Engineering 11(3): 239-258 (2004)
- [j45]Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Removing communications in clustered microarchitectures through instruction replication. TACO 1(2): 127-151 (2004)
- [j44]Pedro Marcuello, Antonio González, Jordi Tubella: Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism. IEEE Trans. Computers 53(2): 114-125 (2004)
- [j43]Teresa Monreal, Víctor Viñals, José González, Antonio González, Mateo Valero: Late Allocation and Early Release of Physical Registers. IEEE Trans. Computers 53(10): 1244-1259 (2004)
- [j42]Xavier Vera, Nerina Bermudo, Josep Llosa, Antonio González: A fast and accurate framework to analyze and optimize cache memory behavior. ACM Trans. Program. Lang. Syst. 26(2): 263-300 (2004)
- [c97]Ramon Canal, Antonio González, James E. Smith: Software-Controlled Operand-Gating. CGO 2004: 125-136
- [c96]
- [c95]Pedro Chaparro, José González, Antonio González: Thermal-Aware Clustered Microarchitectures. ICCD 2004: 48-53
- [c94]Grigorios Magklis, José González, Antonio González: Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2. ICCD 2004: 250-255
- [c93]Fernando Latorre, José González, Antonio González: Back-end assignment schemes for clustered multithreaded processors. ICS 2004: 316-325
- [c92]José González, Fernando Latorre, Antonio González: Cache organizations for clustered microarchitectures. WMPI 2004: 46-55
- 2003
- [j41]Eugenio Aguirre, Antonio González: A Fuzzy Perceptual Model for Ultrasound Sensors Applied to Intelligent Navigation of Mobile Robots. Appl. Intell. 19(3): 171-187 (2003)
- [j40]Jaume Abella, Ramon Canal, Antonio González: Power- and Complexity-Aware Issue Queue Designs. IEEE Micro 23(5): 50-58 (2003)
- [c91]Xavier Vera, Jaume Abella, Antonio González, Josep Llosa: Optimizing Program Locality Through CMEs and GAs. IEEE PACT 2003: 68-78
- [c90]Enric Gibert, F. Jesús Sánchez, Antonio González: Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. CGO 2003: 193-203
- [c89]Carles Aliagas, Carlos Molina, Montse Garcia, Antonio González, Jordi Tubella: Value Compression to Reduce Power in Data Caches. Euro-Par 2003: 616-622
- [c88]Brian Carse, Anthony G. Pipe, Ingo Renners, Adolf Grauel, Antonio F. Gómez-Skarmeta, Fernando Jiménez, Gracia Sánchez, Oscar Cordón, Francisco Herrera, Fernando A. C. Gomide, Igor Walter, Antonio González, Raúl Pérez: Current issues and future directions in evolutionary fuzzy systems research. EUSFLAT Conf. 2003: 81-87
- [c87]Eugenio Aguirre, Antonio González, Raúl Pérez: An inductive approach for learning fuzzy relation rules. EUSFLAT Conf. 2003: 88-93
- [c86]Jaume Abella, Antonio González: Power-Aware Adaptive Issue Queue and Register File. HiPC 2003: 34-43
- [c85]Juan L. Aragón, José González, Antonio González: Power-Aware Control Speculation through Selective Throttling. HPCA 2003: 103-112
- [c84]
- [c83]Jaume Abella, Antonio González: On Reducing Register Pressure and Energy in Multiple-Banked Register Files. ICCD 2003: 14-20
- [c82]
- [c81]Carlos Molina, Carles Aliagas, Montse Garcia, Antonio González, Jordi Tubella: Non redundant data cache. ISLPED 2003: 274-277
- [c80]Luis A. Castillo, Juan Fernández-Olivares, Antonio González: Some Issues about the Representation and Exploitation of Imprecise Temporal Knowledge for an AI Planner. KES 2003: 1321-1328
- [c79]Enric Gibert, F. Jesús Sánchez, Antonio González: Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. MICRO 2003: 315-325
- [c78]Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Instruction Replication for Clustered Microarchitectures. MICRO 2003: 326-338
- [c77]Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang, John Paul Shen: A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS 2003: 13-24
- [e1]Utpal Banerjee, Kyle Gallivan, Antonio González (Eds.): Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003. ACM 2003, ISBN 1-58113-733-8
- 2002
- [j39]Eugenio Aguirre, Antonio González: Integrating fuzzy topological maps and fuzzy geometric maps for behavior-based robots. Int. J. Intell. Syst. 17(3): 333-368 (2002)
- [j38]Olga Pons, Juan C. Cubero, Antonio González, María Amparo Vila Miranda: Uncertain fuzzy values still in the framework of first-order logi. Int. J. Intell. Syst. 17(9): 873-886 (2002)
- [j37]Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, José-Lorenzo Cruz, Fernando Latorre, Antonio González, Mateo Valero: Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Computer Architecture News 30(1): 2-4 (2002)
- [j36]Luis Díaz de Cerio, Miguel Valero-García, Antonio González: Hypercube Algorithms on Mesh Connected Multicomputers. IEEE Trans. Parallel Distrib. Syst. 13(12): 1247-1260 (2002)
- [c76]Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli: Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning. IEEE PACT 2002: 281-290
- [c75]Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio González, José Duato: Efficient Interconnects for Clustered Microarchitectures. IEEE PACT 2002: 291-300
- [c74]Pedro Marcuello, Antonio González: Thread-Spawning Schemes for Speculative Multithreading. HPCA 2002: 55-64
- [c73]Carlos Molina, Antonio González, Jordi Tubella: Trace-Level Speculative Multithreaded Architecture. ICCD 2002: 402-407
- [c72]Teresa Monreal, Víctor Viñals, Antonio González, Mateo Valero: Hardware Schemes for Early Register Release. ICPP 2002: 5-13
- [c71]Jaume Abella, Antonio González, Josep Llosa, Xavier Vera: Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms. ICPP Workshops 2002: 568-580
- [c70]Josep M. Codina, Josep Llosa, Antonio González: A comparative study of modulo scheduling techniques. ICS 2002: 97-106
- [c69]Enric Gibert, F. Jesús Sánchez, Antonio González: An interleaved cache clustered VLIW processor. ICS 2002: 210-219
- [c68]Juan L. Aragón, José González, Antonio González, James E. Smith: Dual path instruction processing. ICS 2002: 220-229
- [c67]Mario Marrero, Celso Perdomo, Jorge Rodríguez, Antonio González: Collaborative Work Tools in Learning Environments. Information Technology in Educational Management 2002: 129-138
- [c66]
- [c65]Xavier Vera, Josep Llosa, Antonio González: Near-Optimal Padding for Removing Conflict Misses. LCPC 2002: 329-343
- [c64]Enric Gibert, F. Jesús Sánchez, Antonio González: Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. MICRO 2002: 123-133
- 2001
- [j35]Luis Díaz de Cerio, Miguel Valero-García, Antonio González, Dolors Royo: CALMANT: Un Método Sistemático para la Ejecución de Algoritmos Hipercubo en Sistemas Multiprocesador. Computación y Sistemas 4(4): 289-297 (2001)
- [j34]Luis Díaz de Cerio, Miguel Valero-García, Antonio González, Dolors Royo: CALMANT: A Systematic Method for the Execution of Hypercube Algorithms in Multiprocessor Systems. Computación y Sistemas 4(4): 298-305 (2001)
- [j33]Luis A. Castillo, Antonio González, Raúl Pérez: Including a simplicity criterion in the selection of the best rule in a genetic fuzzy learning algorithm. Fuzzy Sets and Systems 120(2): 309-321 (2001)
- [j32]Ramon Canal, Joan-Manuel Parcerisa, Antonio González: Dynamic Code Partitioning for Clustered Architectures. International Journal of Parallel Programming 29(1): 59-79 (2001)
- [j31]Antonio González, Raúl Pérez: An experimental study about the search mechanism in the SLAVE learning algorithm: Hill-climbing methods versus genetic algorithms. Inf. Sci. 136(1-4): 159-174 (2001)
- [j30]Luis A. Castillo, Juan Fernández-Olivares, Antonio González: Mixing expressiveness and efficiency in a manufacturing planner. J. Exp. Theor. Artif. Intell. 13(2): 141-162 (2001)
- [j29]F. Jesús Sánchez, Antonio González: Clustered Modulo Scheduling in a VLIW Architecture with Distributed Cache . J. Instruction-Level Parallelism 3 (2001)
- [j28]Dolors Royo, Miguel Valero-García, Antonio González: Implementing the one-sided Jacobi method on a 2D/3D mesh multicomputer. Parallel Computing 27(9): 1253-1271 (2001)
- [j27]Josep Llosa, Eduard Ayguadé, Antonio González, Mateo Valero, Jason Eckhardt: Lifetime-Sensitive Modulo Scheduling in a Production Environment. IEEE Trans. Computers 50(3): 234-249 (2001)
- [j26]Joan-Manuel Parcerisa, Antonio González: Improving Latency Tolerance of Multithreading through Decoupling. IEEE Trans. Computers 50(10): 1084-1094 (2001)
- [j25]José González, Antonio González: Control-Flow Speculation through Value Prediction. IEEE Trans. Computers 50(12): 1362-1376 (2001)
- [c63]Josep M. Codina, F. Jesús Sánchez, Antonio González: A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors. IEEE PACT 2001: 175-184
- [c62]Juan L. Aragón, José González, José M. García, Antonio González: Confidence Estimation for Branch Prediction Reversal. HiPC 2001: 214-223
- [c61]Juan L. Aragón, José González, José M. García, Antonio González: Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow. ICCD 2001: 228-233
- [c60]
- [c59]
- [c58]Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González: Graph-partitioning based instruction scheduling for clustered processors. MICRO 2001: 150-159
- 2000
- [j24]Luis A. Castillo, Juan Fernández-Olivares, Antonio González: Automatic generation of control sequences for manufacturing systems based on partial order planning techniques. AI in Engineering 14(1): 15-30 (2000)
- [j23]Eugenio Aguirre, Antonio González: Fuzzy behaviors for mobile robot navigation: design, coordination and fusion. Int. J. Approx. Reasoning 25(3): 255-289 (2000)
- [j22]Teresa Monreal, Antonio González, Mateo Valero, José González, Víctor Viñals: Dynamic Register Renaming Through Virtual-Physical Registers. J. Instruction-Level Parallelism 2 (2000)
- [j21]F. Jesús Sánchez, Antonio González: Analyzing Data Locality in Numeric Applications. IEEE Micro 20(4): 58-66 (2000)
- [j20]Nerina Bermudo, Xavier Vera, Antonio González, Josep Llosa: Optimizing cache miss equations polyhedra. SIGARCH Computer Architecture News 28(1): 43-52 (2000)
- [c57]Xavier Vera, Josep Llosa, Antonio González, Nerina Bermudo: A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note). Euro-Par 2000: 194-198
- [c56]Luis Díaz de Cerio, Miguel Valero-García, Antonio González: Complete Exchange Algorithms for Meshes and Tori Using a Systematic Approach (Research Note). Euro-Par 2000: 591-594
- [c55]Ramon Canal, Joan-Manuel Parcerisa, Antonio González: Dynamic Cluster Assignment Mechanisms. HPCA 2000: 133-142
- [c54]F. Jesús Sánchez, Antonio González: The Effectiveness of Loop Unrolling for Modulo Scheduling in Clustered VLIW Architectures. ICPP 2000: 555-
- [c53]
- [c52]Pedro Marcuello, Antonio González: A Quantitative Assessment of Thread-Level Speculation Techniques. IPDPS 2000: 595-
- [c51]José-Lorenzo Cruz, Antonio González, Mateo Valero, Nigel P. Topham: Multiple-banked register file architectures. ISCA 2000: 316-325
- [c50]Nerina Bermudo, Xavier Vera, Antonio González, Josep Llosa: An efficient solver for Cache Miss Equations. ISPASS 2000: 139-145
- [c49]F. Jesús Sánchez, Antonio González: Instruction Scheduling for Clustered VLIW Architectures. ISSS 2000: 41-46
- [c48]F. Jesús Sánchez, Antonio González: Modulo scheduling for a fully-distributed clustered VLIW architecture. MICRO 2000: 124-133
- [c47]Ramon Canal, Antonio González, James E. Smith: Very low power pipelines using significance compression. MICRO 2000: 181-190
- [c46]Joan-Manuel Parcerisa, Antonio González: Reducing wire delay penalty through value prediction. MICRO 2000: 317-326
- [c45]Luis A. Castillo, Juan Fernández-Olivares, Antonio González: A hybrid hierarchical operator-based planning approach for the design of control programs. PuK 2000
1990 – 1999
- 1999
- [j19]Luis A. Castillo, Juan Fernández-Olivares, Antonio González: Un algoritmo de planificación no lineal para la generación automáticade programas industriales. Inteligencia Artificial, Revista Iberoamericana de Inteligencia Artificial 3(7): 40-53 (1999)
- [j18]Antonio González, Olga Pons, María Amparo Vila Miranda: Dealing with uncertainty and imprecision by means of fuzzy numbers. Int. J. Approx. Reasoning 21(3): 233-256 (1999)
- [j17]F. Jesús Sánchez, Antonio González: Software Data Prefetching for Software Pipelined Loops. J. Parallel Distrib. Comput. 58(2): 236-259 (1999)
- [j16]Nigel P. Topham, Antonio González: Randomized Cache Placement for Eliminating Conflicts. IEEE Trans. Computers 48(2): 185-192 (1999)
- [j15]Antonio González, Raúl Pérez: SLAVE: a genetic learning system based on an iterative approach. IEEE T. Fuzzy Systems 7(2): 176-191 (1999)
- [j14]Dolors Royo, Antonio González, Miguel Valero-García: Low Communication Overhead Jacobi Algorithms for Eigenvalues Computation on Hypercubes. The Journal of Supercomputing 14(2): 171-193 (1999)
- [c44]José González, Antonio González: Control-Flow Speculation through Value Prediction for Superscalar Processors. IEEE PACT 1999: 57-65
- [c43]Ramon Canal, Joan-Manuel Parcerisa, Antonio González: A Cost-Effective Clustered Architecture. IEEE PACT 1999: 160-168
- [c42]Rafael Alcalá, Jorge Casillas, Antonio González: Tuning fuzzy logic controllers for energy efficiency consumption in buildings. EUSFLAT-ESTYLF Joint Conf. 1999: 103-106
- [c41]Joan-Manuel Parcerisa, Antonio González: The Synergy of Multithreading and Access/Execute Decoupling. HPCA 1999: 59-63
- [c40]Pedro Marcuello, Antonio González: Exploiting Speculative Thread-Level Parallelism on a SMT Processor. HPCN Europe 1999: 754-763
- [c39]Carlos Molina, Antonio González, Jordi Tubella: Reducing Memory Traffic Via Redundant Store Instructions. HPCN Europe 1999: 1246-1249
- [c38]
- [c37]F. Jesús Sánchez, Antonio González: A locality sensitive multi-module cache with explicit management. International Conference on Supercomputing 1999: 51-59
- [c36]Pedro Marcuello, Antonio González: Clustered speculative multithreaded processors. International Conference on Supercomputing 1999: 365-372
- [c35]Carlos Molina, Antonio González, Jordi Tubella: Dynamic removal of redundant computations. International Conference on Supercomputing 1999: 474-481
- [c34]Teresa Monreal, Antonio González, Mateo Valero, José González, Víctor Viñals: Delaying Physical Register Allocation through Virtual-Physical Registers. MICRO 1999: 186-
- [c33]Pedro Marcuello, Jordi Tubella, Antonio González: Value Prediction for Speculative Multithreaded Architectures. MICRO 1999: 230-
- 1998
- [j13]Antonio González, Raúl Pérez: A fuzzy theory refinement algorithm. Int. J. Approx. Reasoning 19(3-4): 193-220 (1998)
- [j12]Luis Díaz de Cerio, Miguel Valero-García, Antonio González: A Method for Exploiting Communication/Computation Overlap in Hypercubes. Parallel Computing 24(2): 221-245 (1998)
- [j11]Josep Llosa, Mateo Valero, Eduard Ayguadé, Antonio González: Modulo Scheduling with Reduced Register Pressure. IEEE Trans. Computers 47(6): 625-638 (1998)
- [c32]F. Jesús Sánchez, Antonio González: Fast, Accurate and Flexible Data Locality Analysis. IEEE PACT 1998: 124-129
- [c31]Joan-Manuel Parcerisa, Antonio González: The Latency Hiding Effectiveness of Decoupled Access/Execute Processors. EUROMICRO 1998: 10293-10300
- [c30]Pedro Marcuello, Antonio González: Data Speculative Multithreaded Architecture. EUROMICRO 1998: 10321-10324
- [c29]Miguel Valero-García, Antonio González, Luis Díaz de Cerio, Dolors Royo: Divide-and-Conquer Algorithms on Two-Dimensional Meshes. Euro-Par 1998: 1051-1056
- [c28]Jordi Tubella, Antonio González: Control Speculation in Multithreaded Processors through Dynamic Loop Detection. HPCA 1998: 14-23
- [c27]
- [c26]Luis A. Castillo, Antonio González: A Nonlinear Planner for Solving Sequential Control Problems in Manufacturing Systems. IBERAMIA 1998: 409-420
- [c25]José González, Antonio González: The Potential of Data Value Speculation to Boost ILP. International Conference on Supercomputing 1998: 21-28
- [c24]Pedro Marcuello, Antonio González, Jordi Tubella: Speculative Multithreaded Processors. International Conference on Supercomputing 1998: 77-84
- [c23]Dolors Royo, Antonio González, Miguel Valero-García: Jacobi Orderings for Multi-Port Hypercubes. IPPS/SPDP 1998: 88-97
- [c22]Dolors Royo, Miguel Valero-García, Antonio González: A Jacobi-based algorithm for computing symmetric eigenvalues and eigenvectors in a two-dimensional mesh. PDP 1998: 463-469
- [c21]José González, Antonio González: Limits of Instruction Level Parallelism with Data Value Speculation. VECPAR 1998: 452-465
- 1997
- [c20]F. Jesús Sánchez, Antonio González, Mateo Valero: Static Locality Analysis for Cache Management. IEEE PACT 1997: 261-271
- [c19]Dolors Royo, Miguel Valero-García, Antonio González, Carme Mari: A Methodology for User-Oriented Scalability Analysis. ASAP 1997: 304-315
- [c18]José González, Antonio González: Memory Address Prediction for Data Speculation. Euro-Par 1997: 1084-1091
- [c17]Antonio Martínez, Fracisco Fraile, Jordi J. Mallorquí, Leonardo Nogueira, Jordi Gabaldá, Antoni Broquetas, Antonio González: PARSAR: Parallelisation of a Chirp Scaling Algorithm SAR Processor. Euro-Par 1997: 1346-1350
- [c16]Antonio González, Mateo Valero, Nigel P. Topham, Joan-Manuel Parcerisa: Eliminating Cache Conflict Misses through XOR-Based Placement Functions. International Conference on Supercomputing 1997: 76-83
- [c15]José González, Antonio González: Speculative Execution via Address Prediction and Data Prefetching. International Conference on Supercomputing 1997: 196-203
- [c14]Nigel P. Topham, Antonio González, José González: The Design and Performance of a Conflict-Avoiding Cache. MICRO 1997: 71-80
- [c13]
- 1996
- [j10]Jordi Tubella, Antonio González, E. Elias: The Multipath Architecture for Prolog Programs. Comput. J. 39(9): 780-792 (1996)
- [j9]Luis Díaz de Cerio, Antonio González, Miguel Valero-García: Communication Pipelining in Hypercubes. Parallel Processing Letters 6(4): 507-523 (1996)
- [c12]Josep Llosa, Antonio González, Eduard Ayguadé, Mateo Valero: Swing module scheduling: a lifetime-sensitive approach. IEEE PACT 1996: 80-86
- [c11]Luis Díaz de Cerio, Miguel Valero-García, Antonio González: Overlapping Communication and Computation in Hypercubes. Euro-Par, Vol. I 1996: 253-257
- 1995
- [j8]Antonio González, Miguel Valero-García, Luis Díaz de Cerio: Executing Algorithms with Hypercube Topology on Torus Multicomputers. IEEE Trans. Parallel Distrib. Syst. 6(8): 803-814 (1995)
- [c10]Antonio González, Carlos Aliagas, Mateo Valero: A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality. International Conference on Supercomputing 1995: 338-347
- [c9]Josep Llosa, Mateo Valero, Eduard Ayguadé, Antonio González: Hypernode reduction modulo scheduling. MICRO 1995: 350-360
- [c8]Enric Fontdecaba, Antonio González, Jesús Labarta: Load Balancing in a Network Flow Optimization Code. PARA 1995: 214-222
- [c7]Jordi Tubella, Antonio González: Exploiting path parallelism in logic programming. PDP 1995: 164-173
- 1994
- [c6]Jordi Tubella, Antonio González: Combining depth-first and breadth-first search in Prolog execution. GULP-PRODE (2) 1994: 452-453
- [c5]Jordi Tubella, Antonio González: A Partial Breadth-First Execution Model for Prolog. ICTAI 1994: 129-137
- [c4]
- 1993
- [j7]Luis M. de Campos, Antonio González: A fuzzy inference model based on an uncertainty forward propagation approach. Int. J. Approx. Reasoning 9(2): 139-164 (1993)
- [j6]Antonio González: A survey of branch techniques in pipelined processors. Microprocessing and Microprogramming 36(5): 243-257 (1993)
- [j5]Mateo Valero, Jordi Cortadella, Antonio González: Chairmen's introduction. Microprocessing and Microprogramming 38(1-5) (1993)
- [j4]Jordi Tubella, Antonio González: MEM: A new execution model for Prolog. Microprocessing and Microprogramming 39(2-5): 83-86 (1993)
- [j3]Antonio González, José M. Llabería: Reducing Branch Delay to Zero in Pipelined Processors. IEEE Trans. Computers 42(3): 363-371 (1993)
- 1992
- [j2]Antonio González, María Amparo Vila Miranda: Dominance relations on fuzzy numbers. Inf. Sci. 64(1-2): 1-16 (1992)
- 1991
- [j1]Antonio González, María Amparo Vila Miranda: A discrete method for studying indifference and order relations between fuzzy numbers. Inf. Sci. 56(1-3): 245-258 (1991)
- [c3]Silvia Acid, Luis M. de Campos, Antonio González, Rafael Molina, Nicolas Pérez de la Blanca: Learning with CASTLE. ECSQARU 1991: 99-106
- 1990
- [c2]Antonio González, María Amparo Vila Miranda: An Interval-Based Approach for Working With Fuzzy Numbers. IPMU 1990: 193-202
1980 – 1989
- 1989
- [c1]Antonio González, José M. Llabería: Instruction fetch unit for parallel execution of branch instructions. ICS 1989: 417-426
Coauthor Index
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last updated on 2013-06-11 21:41 CEST by the dblp team