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Marek Gorgon
2010 – today
- 2012
[j2]Tomasz Kryjak, Marek Gorgon: Pipeline Implementation of Peer Group Filtering in FPGA. Computing and Informatics 31(4): 727- (2012)- [c13]Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon: FPGA implementation of camera tamper detection in real-time. DASIP 2012: 1-8
- [c12]Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon: FPGA implementation of real-time head-shoulder detection using local binary patterns, SVM and foreground object detection. DASIP 2012: 1-8
- [c11]Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon: Is FPGA a suitable platform for advanced video surveillance systems? DASIP 2012: 1-2
- [c10]Mateusz Komorkiewicz, Maciej Kluczewski, Marek Gorgon: Floating point HOG implementation for real-time multiple object detection. FPL 2012: 711-714
- 2011
- [c9]Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon: Real-time moving object detection for video surveillance system in FPGA. DASIP 2011: 209-216
- 2010
- [j1]Tomasz Kryjak, Marek Gorgon: Parallel implementation of local thresholding in Mitrion-C. Applied Mathematics and Computer Science 20(3): 571-580 (2010)
2000 – 2009
- 2009
- [c8]Tomasz Kryjak, Marek Gorgon: Pipeline implementation of the 128-bit block cipher CLEFIA in FPGA. FPL 2009: 373-378
- 2007
- [c7]Marek Gorgon, Piotr Pawlik, Miroslaw Jablonski, Jaromir Przybylo: FPGA-based Road Traffic Videodetector. DSD 2007: 412-419
- [c6]Marek Gorgon, Piotr Pawlik, Miroslaw Jablonski, Jaromir Przybylo: PixelStreams-based implementation of videodetector. FCCM 2007: 321-322
- 2006
- [c5]Slawomir Cichon, Marek Gorgon, Miroslaw Pac: Handel-C Design Enhancement for FPGA-Based DV Decoder. ARC 2006: 128-133
- [c4]Marek Gorgon, Mateusz Wrzesinski: Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP. ICAISC 2006: 19-28
- 2005
- [c3]Marek Gorgon, Slawomir Cichon, Miroslaw Pac: Real-time Handel-C Based Implementation of DV Decoder. FPL 2005: 130-135
- 2004
- [c2]Miroslaw Jablonski, Marek Gorgon: Handel-C implementation of Classical Component Labelling Algorithm. DSD 2004: 387-393
- 2001
- [c1]Marek Gorgon, Jaromir Przybylo: FPGA Based Controller for Heterogeneous Image Processing System. DSD 2001: 453-457
Coauthor Index
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last updated on 2013-01-12 20:01 CET by the dblp team