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 | 2012 | |
|---|---|---|
| c38 |      | Eric Guthmuller, Ivan Miro Panades, Alain Greiner: Adaptive Stackable 3D Cache Architecture for Manycores. ISVLSI 2012: 39-44 |
| 2011 | ||
| c37 | | Joel Porquet, Alain Greiner, Christian Schwarz: NoC-MPU: A secure architecture for flexible co-hosting on shared memory MPSoCs. DATE 2011: 591-594 |
| c36 | | Zhen Zhang, Dimitri Refauvelet, Alain Greiner, Mounir Benabdenbi, François Pêcheux: Localization of damaged resources in NoC based shared-memory MP2SOC, using a Distributed Cooperative Configuration Infrastructure. VTS 2011: 229-234 |
| 2010 | ||
| c35 | | Aline Mello, Isaac Maia, Alain Greiner, François Pêcheux: Parallel simulation of systemC TLM 2.0 compliant MPSoC on SMP workstations. DATE 2010: 606-609 |
| c34 | | Zhen Zhang, Alain Greiner, Mounir Benabdenbi: Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components. IOLTS 2010: 194-196 |
| c33 | | François Pêcheux, Khouloud Zine el Abidine, Alain Greiner: Early Power Estimation in Heterogeneous Designs Using SoCLib and SystemC-AMS. PATMOS 2010: 252 |
| 2009 | ||
| c32 | | Alain Greiner, Etienne Faure, Nicolas Pouillon, Daniela Genius: A generic hardware / software communication middleware for streaming applications on shared memory multi processor systems-on-chip. FDL 2009: 1-4 |
| c31 | | Nicolas Pouillon, Alexandre Becoulet, Aline Vieira de Mello, François Pêcheux, Alain Greiner: A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs. IEEE International Workshop on Rapid System Prototyping 2009: 116-122 |
| 2008 | ||
| j3 | | Abbas Sheibanyrad, Alain Greiner, Ivan Miro Panades: Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. IEEE Design & Test of Computers 25(6): 572-580 (2008) |
| j2 | | Abbas Sheibanyrad, Alain Greiner: Two efficient synchronous <--> asynchronous converters well-suited for networks-on-chip in GALS architectures. Integration 41(1): 17-26 (2008) |
| c30 | | Zhen Zhang, Alain Greiner, Sami Taktak: A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip. DAC 2008: 441-446 |
| c29 | | Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, Alain Greiner: Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture. NOCS 2008: 139-148 |
| 2007 | ||
| j1 | | Hervé Charlery, Adrijean Andriahantenaina, Alain Greiner: Physical design of the VCI wrappers for the on-chip packet-switched network named SPIN. Computers & Electrical Engineering 33(4): 299-309 (2007) |
| c28 |  | Abbas Sheibanyrad, Alain Greiner: Hybrid-Timing FIFOs to Use on Networks-on-Chip in GALS Architectures. ESA 2007: 27-33 |
| c27 | | Abbas Sheibanyrad, Ivan Miro Panades, Alain Greiner: Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture. DATE 2007: 1090-1095 |
| c26 | | Ivan Miro Panades, Alain Greiner: Bi-Synchronous FIFO for Synchronous Circuit Communication Well Suited for Network-on-Chip in GALS Architectures. NOCS 2007: 83-94 |
| c25 | | Matthieu Tuna, Mounir Benabdenbi, Alain Greiner: At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester. VTS 2007: 447-454 |
| 2006 | ||
| c24 | | Rabie Ben Atitallah, Smaïl Niar, Alain Greiner, Samy Meftali, Jean-Luc Dekeyser: Estimating Energy Consumption for an MPSoC Architectural Exploration. ARCS 2006: 298-310 |
| c23 | | Emmanuel Viaud, François Pêcheux, Alain Greiner: An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles. DATE 2006: 94-99 |
| c22 | | Frédéric Pétrot, Alain Greiner, Pascal Gomez: On Cache Coherency and Memory Consistency Issues in NoC Based Shared Memory Multiprocessor SoC Architectures. DSD 2006: 53-60 |
| c21 | | Abbas Sheibanyrad, Alain Greiner: Two Efficient Synchronous Û Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures. PATMOS 2006: 191-202 |
| c20 | | Alain Greiner, Frédéric Pétrot, M. Carrier, Mounir Benabdenbi, Roselyne Chotin-Avot, Raphaël Labayrade: MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation. ReCoSoC 2006: 24-30 |
| c19 | | Etienne Faure, Alain Greiner, Daniela Genius: A generic hardware/software communication mechanism for Multi-Processor System on Chip, Targeting Telecommunication Applications. ReCoSoC 2006: 237-242 |
| 2004 | ||
| c18 | | Mounir Benabdenbi, Alain Greiner, François Pêcheux, Emmanuel Viaud, Matthieu Tuna: STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores. DATE 2004: 712-713 |
| c17 | | Marie-Minerve Louërat, Tuong P. Nguyen, Vincent Bourguet, L. de Lamarre, Alain Greiner: A language to desing generators of analog functions (poster). FDL 2004: 30-32 |
| 2003 | ||
| c16 | | Adrijean Andriahantenaina, Alain Greiner: Micro-Network for SoC: Implementation of a 32-Port SPIN network. DATE 2003: 11128-11129 |
| c15 | | Adrijean Andriahantenaina, Hervé Charlery, Alain Greiner, Laurent Mortiez, Cesar Albenes Zeferino: SPIN: A Scalable, Packet Switched, On-Chip Micro-Network. DATE 2003: 20070-20073 |
| 2001 | ||
| c14 | | Mohamed Dessouky, Andreas Kaiser, Marie-Minerve Louërat, Alain Greiner: Analog design for reuse - case study: very low-voltage sigma-delta modulator. DATE 2001: 353-360 |
| c13 | | Jean Lou Desbarbieux, Olivier Glück, Amal Zerrouki, Alexandre Fenyo, Alain Greiner, Franck Wajsbürt, Cyril Spasevski, Fabrício Silva, E. Dreyfus: Protocol and Performance Analysis of the MPC Parallel Computer. IPDPS 2001: 52 |
| 2000 | ||
| c12 | | Pierre Guerrier, Alain Greiner: A Generic Architecture for On-Chip Packet-Switched Interconnections. DATE 2000: 250-256 |
| 1997 | ||
| c11 | | Frédéric Pétrot, Denis Hommais, Alain Greiner: A Simulation Environment for Core Based Embedded Systems. Annual Simulation Symposium 1997: 86-91 |
| c10 | | Frédéric Pétrot, Denis Hommais, Alain Greiner: Cycle precise core based hardware/software system simulation with predictable event propagation. EUROMICRO 1997: 182-187 |
| 1995 | ||
| c9 | | Marcello Duhalde, Alain Greiner, Frédéric Pétrot: A High Performance Modular Embedded ROM Architecture. ISCAS 1995: 1057-1060 |
| 1994 | ||
| c8 | | Alain Greiner, L. Lucas, Franck Wajsbürt, Laurent Winckel: Design of a High Complexity Superscalar Microprocessor with the Portable IDPS ASIC Library. EDAC-ETC-EUROASIC 1994: 9-13 |
| c7 | | Luc Burgun, N. Dictus, Alain Greiner, E. Prado Lopes, C. Sarwary: Multilevel logic optimization of very high complexity circuits. EURO-DAC 1994: 14-19 |
| c6 | | M. Hirech, O. Florent, Alain Greiner, E. Rejouan: A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. EDAC-ETC-EUROASIC 1994: 668 |
| c5 | | Luc Burgun, N. Dictus, Alain Greiner, E. Pradho, C. Sarwary: Multilevel Logic Synthesis of Very High Complexity Circuits. EDAC-ETC-EUROASIC 1994: 669 |
| c4 | | Alain Greiner, Frédéric Pétrot: Using C to write portable CMOS VLSI module generators. EURO-DAC 1994: 676-681 |
| c3 | | Denis Archambaud, Pascal Faudemay, Alain Greiner: RAPID-2, An Object-Oriented Associative Memory Applicable to Genome Data Processing. HICSS (5) 1994: 150-159 |
| c2 | | M. Hirech, O. Florent, Alain Greiner, E. Rejouan: A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. ISCAS 1994: 89-92 |
| 1992 | ||
| c1 | | Lotfi Ben Ammar, Alain Greiner: FITPATH: A Process-Independent Datapath Compiler Providing High Density Layout. Synthesis for Control Dominated Circuits 1992: 133-151 |
Colors in the list of coauthors
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