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Pawel Grybos
2010 – today
- 2013
[c6]Piotr Maj, Aleksandra Drozd, Robert Szczygiel, Pawel Grybos: FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies. UKSim 2013: 780-786- 2011
- [c5]Piotr Kmon, Pawel Grybos, Robert Szczygiel, Miroslaw Zoladz: Tuning the low cut-off frequency in multichannel neural recording amplifiers by the on-chip correction DACs. ECCTD 2011: 302-305
- [c4]Piotr Maj, Pawel Grybos, Robert Szczygiel: Development of a fast readout chip in deep submicron technology for pixel hybrid detectors. ECCTD 2011: 409-412
- [c3]Piotr Kmon, Miroslaw Zoladz, Pawel Grybos, Robert Szczygiel: Comparision of two different architectures of multichannel readout ASICs for neurobiological experiments. EUROCON 2011: 1-4
- [c2]Robert Szczygiel, Pawel Grybos, Piotr Maj: A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS. ISCAS 2011: 1415-1418
2000 – 2009
- 2006
- [c1]Pawel Grybos, M. Idzik, K. Swientek, Piotr Maj: Integrated charge sensitive amplifier with pole-zero cancellation circuit for high rates. ISCAS 2006
- 2004
- [j2]W. Dabrowski, Pawel Grybos, T. Fiutowski: Design for good matching in multichannel low-noise amplifier for recording neuronal signals in modern neuroscience experiments. Microelectronics Reliability 44(2): 351-361 (2004)
- 2002
- [j1]Pawel Grybos, W. Dabrowski, P. Hottowy, Robert Szczygiel, K. Swientek, P. Wiacek: Multichannel mixed-mode IC for digital readout of silicon strip detectors. Microelectronics Reliability 42(3): 427-436 (2002)
Coauthor Index
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last updated on 2013-06-13 23:06 CEST by the dblp team