Ji Gu

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	2012
c5		Ji Gu, Tohru Ishihara, Kyungsoo Lee: Loop instruction caching for energy-efficient embedded multitasking processors. ESTImedia 2012: 97-106
c4		Ji Gu, Tohru Ishihara: A Case Study of Energy-efficient Loop Instruction Cache Design for Embedded Multitasking Systems. SMARTGREENS 2012: 197-202
	2011
j3		Ji Gu, Hui Guo: Reducing Power and Energy Overhead in Instruction Prefetching for Embedded Processor Systems. IJHCR 2(4): 42-58 (2011)
j2		Ji Gu, Hui Guo, Patrick Li: An on-chip instruction cache design with one-bit tag for low-power embedded systems. Microprocessors and Microsystems - Embedded Hardware Design 35(4): 382-391 (2011)
	2010
c3		Ji Gu, Hui Guo: Enabling large decoded instruction loop caching for energy-aware embedded processors. CASES 2010: 247-256
	2009
j1		Ji Gu, Hui Guo: An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction. EURASIP J. Emb. Sys. 2009 (2009)
c2		Ji Gu, Hui Guo: A Segmental Bus-invert Coding Method for Instruction Memory Data Bus Power Efficiency. ISCAS 2009: 137-140
c1		Ji Gu, Hui Guo, Patrick Li: ROBTIC: An On-chip Instruction Cache Design for Low Power Embedded Systems. RTCSA 2009: 419-424

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