| 2012 | ||
|---|---|---|
| j6 | Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli: A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology. J. Solid-State Circuits 47(8): 1828-1841 (2012) | |
| 2011 | ||
| c12 | Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli: A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology. CICC 2011: 1-4 | |
| 2007 | ||
| j5 | Jong-Ru Guo, Chao You, Mike Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Peng Jin, Russell P. Kraft, John F. McDonald: Silicon germanium programmable circuits for gigahertz applications. IET Circuits, Devices & Systems 1(1): 27-33 (2007) | |
| j4 | Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald: A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits. IEEE Trans. VLSI Syst. 15(9): 1051-1054 (2007) | |
| 2005 | ||
| j3 | Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald: A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integration 38(3): 525-540 (2005) | |
| j2 | Kuan Zhou, Jong-Ru Guo, Chao You, John Mayega, Russell P. Kraft, T. Zhang, John F. McDonald, Bryan S. Goda: Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques. Journal of Circuits, Systems, and Computers 14(2): 179-194 (2005) | |
| j1 | Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald: A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. Microprocessors and Microsystems 29(2-3): 121-131 (2005) | |
| c11 | Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald: A 11 GHz FPGA with Test Applications. FPL 2005: 101-105 | |
| c10 | Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald: A High Speed Reconfigurable Gate Array for Gigahertz Applications. ISVLSI 2005: 124-129 | |
| 2004 | ||
| c9 | Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald: The gigahertz FPGA: design consideration and applications. FPGA 2004: 248 | |
| c8 | Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald: The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI 2004: 141-144 | |
| 2003 | ||
| c7 | Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald: A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. Engineering of Reconfigurable Systems and Algorithms 2003: 181-187 | |
| c6 | Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald: A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology. FPGA 2003: 145-153 | |
| c5 | Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda: A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA 2003: 248 | |
| c4 | Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald: Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. FPL 2003: 11-20 | |
| c3 | Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald: A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. ACM Great Lakes Symposium on VLSI 2003: 37-40 | |
| 2002 | ||
| c2 | Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald: Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. FPL 2002: 414-423 | |
| c1 | Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald: Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. FPT 2002: 182-188 | |
Colors in the list of coauthors
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