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 | 2012 | |
|---|---|---|
| j13 |      | Shen Wang, Vipul Chawla, Dong Sam Ha, Beomsup Kim: Low-Voltage Low-Power 1.6 GHz Quadrature Signal Generation Through Stacking a Transformer-Based VCO and a Divide-by-Two. IEEE Trans. on Circuits and Systems 59-I(12): 2901-2910 (2012) |
| c36 | | Carlos Quemada, Travis L. Cochran, Dong Sam Ha: A compact resistorless 1.5-V CMOS current reference with 16.5-ppm/°C temperature coefficient. ISCAS 2012: 3146-3149 |
| 2011 | ||
| c35 | | Shen Wang, Dong Sam Ha, Beomsup Kim, Vipul Chawla: A combined VCO and divide-by-two for low-voltage low-power 1.6 GHz quadrature signal generation. CICC 2011: 1-4 |
| c34 | | Vipul Chawla, Dong Sam Ha: Dual use of power lines for data communications in microprocessors. DDECS 2011: 23-28 |
| c33 | | Jeong-Ki Kim, Jihoon Jeong, Dong Sam Ha, Hyung-soo Lee: Low-power quadrature VCO design for medical implant communication service. DDECS 2011: 403-404 |
| c32 | | Rajesh Thirugnanam, Dong Sam Ha: Feasibility study for communication over Power Distribution Networks of microprocessors. SoCC 2011: 118-121 |
| 2009 | ||
| j12 | | Jong-Suk Lee, Dong Sam Ha: FleXilicon Architecture and Its VLSI Implementation. IEEE Trans. VLSI Syst. 17(8): 1021-1033 (2009) |
| 2008 | ||
| c31 | | Na Kong, Dong Sam Ha, Jian Li, Fred C. Lee: Off-time prediction in digital constant on-time modulation for DC-DC converters. ISCAS 2008: 3270-3273 |
| 2007 | ||
| c30 | | Jong-Suk Lee, Dong Sam Ha: High Speed 1-bit Bypass Adder Design for Low Precision Additions. ISCAS 2007: 1093-1096 |
| c29 | | Rajesh Thirugnanam, Dong Sam Ha, T. M. Mak: Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor. ISVLSI 2007: 153-158 |
| 2006 | ||
| c28 | | Jong-Suk Lee, Dong Sam Ha: FleXilicon: a reconfigurable architecture for multimedia and wireless communications. ISCAS 2006 |
| c27 | | Rajesh Thirugnanam, Dong Sam Ha, Bong Hyuk Park, Sangsung Choi: Design of a tunable fully differential GHz range Gm-C lowpass filter in 0.18µm CMOS for DS-CDMA UWB transceivers. ISCAS 2006 |
| 2005 | ||
| c26 | | Jung-Ho Kim, Dong Sam Ha, Jeffrey H. Reed: A new reconfigurable modem architecture for 3G multi-standard wireless communication systems. ISCAS (2) 2005: 1051-1054 |
| c25 | | Woo Cheol Chung, Dong Sam Ha, Hyung-Jin Lee: Dual use of power lines for data communications in a system-on-chip environment. ISCAS (4) 2005: 3355-3358 |
| c24 | | Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi: A systematic approach to CMOS low noise amplifier design for ultrawideband applications. ISCAS (4) 2005: 3962-3965 |
| c23 | | Sajay Jose, Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi: A low-power CMOS power amplifier for ultra wideband (UWB) applications. ISCAS (5) 2005: 5111-5114 |
| c22 | | |
| 2004 | ||
| j11 | | Nathaniel J. August, Dong Sam Ha: Low power design of DCT and IDCT for low bit rate video codecs. IEEE Transactions on Multimedia 6(3): 414-422 (2004) |
| c21 |  | Venkat Srinivasan, Dong Sam Ha, Jos Sulistyo: Gigahertz-range MCML multiplier architectures. ISCAS (2) 2004: 785-788 |
| c20 | | Nathaniel J. August, Dong Sam Ha: An efficient UWB radio architecture for busy signal MAC protocols. SECON 2004: 325-334 |
| 2003 | ||
| c19 | | Jos Sulistyo, Dong Sam Ha: 5 GHz pipelined multiplier and MAC in 0.18µm complementary static CMOS. ISCAS (5) 2003: 117-120 |
| c18 | | Suk Won Kim, Dong Sam Ha, Jeffrey H. Reed: Minimum selection GSC and adaptive low-power rake combining scheme. ISCAS (4) 2003: 357-360 |
| c17 | | Hyung-Jin Lee, Dong Sam Ha: Frequency Domain Approach for CMOS Ultra-Wideband Radios. ISVLSI 2003: 236-237 |
| 2002 | ||
| j10 | | Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi: A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. IEEE Trans. Computers 51(5): 486-497 (2002) |
| 2001 | ||
| c16 | | |
| 2000 | ||
| j9 | | Sungjoo Yoo, Kiyoung Choi, Dong Sam Ha: Performance improvement of geographically distributed cosimulation by hierarchically grouped messages. IEEE Trans. VLSI Syst. 8(5): 492-502 (2000) |
| j8 | | Han Bin Kim, Dong Sam Ha, Takeshi Takahashi, Takahiro J. Yamaguchi: A new approach to built-in self-testable datapath synthesis based on integer linear programming. IEEE Trans. VLSI Syst. 8(5): 594-605 (2000) |
| 1999 | ||
| c15 | | Han Bin Kim, Dong Sam Ha, Takeshi Takahashi: On ILP Formulations for Built-In Self-Testable Data Path Synthesis. DAC 1999: 742-747 |
| c14 | | Han Bin Kim, Dong Sam Ha: A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming. ITC 1999: 903-912 |
| 1998 | ||
| c13 | | Han Bin Kim, Takeshi Takahashi, Dong Sam Ha: Test session oriented built-in self-testable data path synthesis. ITC 1998: 154-163 |
| c12 | | Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi: COMPACT: A Hybrid Method for Compressing Test Data. VTS 1998: 62-69 |
| 1997 | ||
| c11 | | Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha: An Efficient Method for Compressing Test Data. ITC 1997: 79-88 |
| 1996 | ||
| j7 | | Hyung Ki Lee, Dong Sam Ha: HOPE: an efficient parallel fault simulator for synchronous sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1048-1058 (1996) |
| 1995 | ||
| c10 | | Insung Park, Dong Sam Ha, Gyoochan Sim: A New Method for Partial Scan Design Based on Propagation and Justification Requirements of Faults. ITC 1995: 413-422 |
| c9 | | Rajesh Nair, Dong Sam Ha: VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits. VTS 1995: 221-226 |
| 1993 | ||
| c8 | | Hyung Ki Lee, Dong Sam Ha: New methods of improving parallel fault simulation in synchronous sequential circuits. ICCAD 1993: 10-17 |
| 1992 | ||
| j6 | | Dong Sam Ha, Sudhakar M. Reddy: On the design of random pattern testable PLA based on weighted random pattern testing. J. Electronic Testing 3(2): 149-157 (1992) |
| c7 | | Hyung Ki Lee, Dong Sam Ha: HOPE: An Efficient Parallel Fault Simulator for Synchronous Sequential Circuits. DAC 1992: 336-340 |
| 1991 | ||
| j5 | | Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha: BIDES: A BIST design expert system. J. Electronic Testing 2(2): 165-179 (1991) |
| c6 | | Hyung Ki Lee, Dong Sam Ha: An Efficient, Forward Fault Simulation Algorithm Based on the Parallel Pattern Single Fault Propagation. ITC 1991: 946-955 |
| 1990 | ||
| j4 | | Dong Sam Ha, Vijay P. Kumar: On the Design of High-Yield Reconfigurable PLA's. IEEE Trans. Computers 39(4): 470-479 (1990) |
| c5 | | Hyung Ki Lee, Dong Sam Ha: SOPRANO: An Efficient Automatic Test Pattern Generator for Stuck-Open Faults in CMOS Combinational Circuits. DAC 1990: 660-666 |
| 1989 | ||
| c4 | | Hyung Ki Lee, Dong Sam Ha, K. Kim: Test Generation of Stuck-open Faults Using Stuck-at Test Sets in CMOS Combinational Circuits. DAC 1989: 345-350 |
| 1988 | ||
| j3 | | Dong Sam Ha, Sudhakar M. Reddy: On the Design of Pseudoexhaustive Testable PLA's. IEEE Trans. Computers 37(4): 468-472 (1988) |
| j2 | | Kwanghyun Kim, Dong Sam Ha, Joseph G. Tront: On using signature registers as pseudorandom pattern generators in built-in self-testing. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 919-928 (1988) |
| c3 | | Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha: Automatic Insertion of BIST Hardware Using VHDL. DAC 1988: 9-15 |
| 1987 | ||
| j1 | | Sudhakar M. Reddy, Dong Sam Ha: A New Approach to the Design of Testable PLA's. IEEE Trans. Computers 36(2): 201-211 (1987) |
| 1986 | ||
| c2 | | |
| 1985 | ||
| c1 | | |
Colors in the list of coauthors
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