| 2013 | ||
|---|---|---|
| j3 | Chizu Matsumoto, Yuichi Hamamura, Michinobu Nakao, Kaname Yamasaki, Yoshikazu Saito, Shun'ichi Kaneko: Novel Fuse Scheme with a Short Repair Time to Maximize Good Chips per Wafer in Advanced SoCs. IEICE Transactions 96-C(1): 108-114 (2013) | |
| 2011 | ||
| j2 | Chizu Matsumoto, Yuichi Hamamura, Yoshiyuki Tsunoda, Hiroshi Uozaki, Isao Miyazaki, Shiro Kamohara, Yoshiyuki Kaneko, Kenji Kanamitsu: A New Critical Area Simulation Algorithm and Its Application for Failing Bit Analysis. IEICE Transactions 94-C(3): 353-360 (2011) | |
| 2009 | ||
| j1 | Yuichi Hamamura, Chizu Matsumoto, Yoshiyuki Tsunoda, Koji Kamoda, Yoshio Iwata, Kenji Kanamitsu, Daisuke Fujiki, Fujihiko Kojika, Hiromi Fujita, Yasuo Nakagawa, Shun'ichi Kaneko: Development of an Enterprise-Wide Yield Management System Using Critical Area Analysis for High-Product-Mix Semiconductor Manufacturing. IEICE Transactions 92-C(1): 144-152 (2009) | |
| 2002 | ||
| c1 | Yuichi Hamamura, Kazunori Nemoto, Takaaki Kumazawa, Hisafumi Iwata, Kousuke Okuyama, Shiro Kamohara, Aritoshi Sugimoto: Repair Yield Simulation with Iterative Critical Area Analysis for Different Types of Failure. DFT 2002: 305-313 | |
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