| 2013 | ||
|---|---|---|
| j32 | Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu, Brian P. Degnan: A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena. IEEE Trans. Biomed. Circuits and Systems 7(1): 71-81 (2013) | |
| j31 | Samuel Shapero, Paul E. Hasler: Mismatch Characterization and Calibration for Accurate and Automated Analog Design. IEEE Trans. on Circuits and Systems 60-I(3): 548-556 (2013) | |
| j30 | Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson: Scaling Energy Per Operation via an Asynchronous Pipeline. IEEE Trans. VLSI Syst. 21(1): 147-151 (2013) | |
| 2012 | ||
| j29 | Samuel Shapero, Adam S. Charles, Christopher J. Rozell, Paul E. Hasler: Low Power Sparse Approximation on Reconfigurable Analog Hardware. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(3): 530-541 (2012) | |
| j28 | Craig Schlottmann, Samuel Shapero, Stephen Nease, Paul E. Hasler: A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing. J. Solid-State Circuits 47(9): 2174-2184 (2012) | |
| j27 | Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink: Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform. IEEE Trans. Biomed. Circuits and Systems 6(1): 76-84 (2012) | |
| j26 | Gokce Gurun, Jaime S. Zahorian, Alper Sisman, Mustafa Karaman, Paul E. Hasler, Levent Degertekin: An Analog Integrated Circuit Beamformer for High-Frequency Medical Ultrasound Imaging. IEEE Trans. Biomed. Circuits and Systems 6(5): 454-467 (2012) | |
| j25 | Craig Schlottmann, David N. Abramson, Paul E. Hasler: A MITE-Based Translinear FPAA. IEEE Trans. VLSI Syst. 20(1): 1-9 (2012) | |
| j24 | Craig Schlottmann, Csaba Petre, Paul E. Hasler: A High-Level Simulink-Based Tool for FPAA Configuration. IEEE Trans. VLSI Syst. 20(1): 10-18 (2012) | |
| c114 | Craig Schlottmann, Stephen Nease, Samuel Shapero, Paul E. Hasler: A mixed-mode FPAA SoC for analog-enhanced signal processing. CICC 2012: 1-4 | |
| c113 | Jeff Dugger, Paul D. Smith, Matt Kucic, Paul E. Hasler: An analog adaptive beamforming circuit for audio noise reduction. ICASSP 2012: 5293-5296 | |
| c112 | Craig Schlottmann, Paul E. Hasler: FPAA empowering cooperative analog-digital signal processing. ICASSP 2012: 5301-5304 | |
| c111 | Scott Koziol, Paul E. Hasler, Mike Stilman: Robot path planning using Field Programmable Analog Arrays. ICRA 2012: 1747-1752 | |
| 2011 | ||
| j23 | Craig Schlottmann, Paul E. Hasler: A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 403-411 (2011) | |
| j22 | Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon: Floating Gate Synapses With Spike-Time-Dependent Plasticity. IEEE Trans. Biomed. Circuits and Systems 5(3): 244-252 (2011) | |
| j21 | Sangwook Suh, Arindam Basu, Craig Schlottmann, Paul E. Hasler, John R. Barry: Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach. IEEE Trans. on Circuits and Systems 58-I(2): 290-298 (2011) | |
| j20 | Arindam Basu, Paul E. Hasler: A Fully Integrated Architecture for Fast and Accurate Programming of Floating Gates Over Six Decades of Current. IEEE Trans. VLSI Syst. 19(6): 953-962 (2011) | |
| c110 | Scott Koziol, Paul E. Hasler: Reconfigurable Analog VLSI circuits for robot path planning. AHS 2011: 36-43 | |
| c109 | Scott Koziol, David Lenz, Sebastian Hilsenbeck, Smriti Chopra, Paul E. Hasler, Ayanna Howard: Using floating-gate based programmable analog arrays for real-time control of a game-playing robot. SMC 2011: 3566-3571 | |
| 2010 | ||
| j19 | Arindam Basu, Stephen Brink, Craig Schlottmann, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, I. Faik Baskaya, Christopher M. Twigg, Paul E. Hasler: A Floating-Gate-Based Field-Programmable Analog Array. J. Solid-State Circuits 45(9): 1781-1794 (2010) | |
| j18 | Ryan W. Robucci, Jordan D. Gray, Leung Kin Chiu, Justin K. Romberg, Paul E. Hasler: Compressive Sensing on a CMOS Separable-Transform Image Sensor. Proceedings of the IEEE 98(6): 1089-1101 (2010) | |
| j17 | Arindam Basu, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, Stephen Brink, Paul E. Hasler: Neural Dynamics in Reconfigurable Silicon. IEEE Trans. Biomed. Circuits and Systems 4(5): 311-319 (2010) | |
| j16 | Arindam Basu, Csaba Petre, Paul E. Hasler: Dynamics and Bifurcations in a Silicon Neuron. IEEE Trans. Biomed. Circuits and Systems 4(5): 320-328 (2010) | |
| j15 | Arindam Basu, Paul E. Hasler: Nullcline-Based Design of a Silicon Neuron. IEEE Trans. on Circuits and Systems 57-I(11): 2938-2947 (2010) | |
| j14 | Bo Marr, Jason George, Brian P. Degnan, David V. Anderson, Paul E. Hasler: Error Immune Logic for Low-Power Probabilistic Computing. VLSI Design 2010 (2010) | |
| j13 | Kofi M. Odame, Paul E. Hasler: Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping. VLSI Design 2010 (2010) | |
| c108 | Craig Schlottmann, Csaba Petre, Paul E. Hasler: Vector matrix multiplier on field programmable analog array. ICASSP 2010: 1522-1525 | |
| c107 | Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon: Floating gate synapses with spike time dependent plasticity. ISCAS 2010: 369-372 | |
| c106 | Brian P. Degnan, Brian J. Duffy, Paul E. Hasler: Crossbar switch matrix for floating-gate programming over large current ranges. ISCAS 2010: 861-864 | |
| c105 | Craig Schlottmann, Brian P. Degnan, David N. Abramson, Paul E. Hasler: Reducing offset errors in MITE systems by precise floating gate programming. ISCAS 2010: 1340-1343 | |
| c104 | Arindam Basu, Shubha Ramakrishnan, Paul E. Hasler: Neural dynamics in reconfigurable silicon. ISCAS 2010: 1943-1946 | |
| c103 | Muhammad Shakeel Qureshi, Arindam Basu, Baris Bicen, Levent Degertekin, Paul E. Hasler: Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone. ISCAS 2010: 2031-2034 | |
| c102 | Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine: Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2793 | |
| c101 | Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine: Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2794-2797 | |
| 2009 | ||
| j12 | Christopher M. Twigg, Paul E. Hasler: Configurable analog signal processing. Digital Signal Processing 19(6): 904-922 (2009) | |
| j11 | Kofi M. Odame, Paul E. Hasler: Theory and Design of OTA-C Oscillators with Native Amplitude Limiting. IEEE Trans. on Circuits and Systems 56-I(1): 40-50 (2009) | |
| c100 | Bo Marr, Arindam Basu, Stephen Brink, Paul E. Hasler: A learning digital computer. DAC 2009: 617-618 | |
| c99 | Sheng-Yu Peng, Gokce Gurun, Christopher M. Twigg, Muhammad Shakeel Qureshi, Arindam Basu, Stephen Brink, Paul E. Hasler, Levent Degertekin: A Large-scale Reconfigurable Smart Sensory Chip. ISCAS 2009: 2145-2148 | |
| c98 | Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler: Passgate Resistance Estimation based on the Compact EKV Model and Effective Mobility. ISCAS 2009: 2765-2768 | |
| c97 | Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson: An Asynchronously Embedded Datapath for Performance Acceleration and Energy Efficiency. ISCAS 2009: 3046-3049 | |
| 2008 | ||
| j10 | Erhan Özalevli, Walter Huang, Paul E. Hasler, David V. Anderson: A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering. IEEE Trans. on Circuits and Systems 55-I(2): 510-521 (2008) | |
| j9 | Kofi M. Odame, David V. Anderson, Paul E. Hasler: A Bandpass Filter With Inherent Gain Adaptation for Hearing Applications. IEEE Trans. on Circuits and Systems 55-I(3): 786-795 (2008) | |
| j8 | Erhan Özalevli, Haw-Jing Lo, Paul E. Hasler: Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References. IEEE Trans. on Circuits and Systems 55-I(4): 990-998 (2008) | |
| j7 | Erhan Özalevli, Paul E. Hasler: Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique. IEEE Trans. on Circuits and Systems 55-I(4): 999-1010 (2008) | |
| j6 | Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, Arindam Basu, Levent Degertekin: A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit. IEEE Trans. on Circuits and Systems 55-I(7): 1863-1872 (2008) | |
| j5 | Venkatesh Srinivasan, Guillermo J. Serrano, Christopher M. Twigg, Paul E. Hasler: A Floating-Gate-Based Programmable CMOS Reference. IEEE Trans. on Circuits and Systems 55-I(11): 3448-3456 (2008) | |
| j4 | Christopher M. Twigg, Paul E. Hasler: Incorporating Large-Scale FPAAs Into Analog Design and Test Courses. IEEE Trans. Education 51(3): 319-324 (2008) | |
| c96 | Sheng-Yu Peng, Yu Tsao, Paul E. Hasler, David V. Anderson: A programmable analog radial-basis-function based classifier. ICASSP 2008: 1425-1428 | |
| c95 | Ryan W. Robucci, Leung Kin Chiu, Jordan D. Gray, Justin K. Romberg, Paul E. Hasler, David V. Anderson: Compressive sensing on a CMOS separable transform image sensor. ICASSP 2008: 5125-5128 | |
| c94 | ||
| c93 | Stephen Brink, Scott Koziol, Shubha Ramakrishnan, Paul E. Hasler: A biophysically based dendrite model using programmable floating-gate devices. ISCAS 2008: 432-435 | |
| c92 | Csaba Petre, Craig Schlottmann, Paul E. Hasler: Automated conversion of Simulink designs to analog hardware on an FPAA. ISCAS 2008: 500-503 | |
| c91 | Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler: Analog VLSI implementation of support vector machine learning and classification. ISCAS 2008: 860-863 | |
| c90 | Jordan D. Gray, Venkatesh Srinivasan, Ryan W. Robucci, Paul E. Hasler: A floating-gate transistor based continuous-time analog adaptive filter. ISCAS 2008: 908-911 | |
| c89 | Ryan W. Robucci, Jordan D. Gray, David N. Abramson, Paul E. Hasler: A 256×256 separable transform CMOS imager. ISCAS 2008: 1420-1423 | |
| 2007 | ||
| c88 | I. Faik Baskaya, Brian Gestner, Christopher M. Twigg, Sung Kyu Lim, David V. Anderson, Paul E. Hasler: Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array. FCCM 2007: 319-320 | |
| c87 | Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler: Programmable Floating Gate FPAA Switches Are Not Dead Weight. ISCAS 2007: 169-172 | |
| c86 | Christopher M. Twigg, Paul E. Hasler: Programmable Conductance Switches for FPAAs. ISCAS 2007: 173-176 | |
| c85 | Paul E. Hasler, Christopher M. Twigg: An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. ISCAS 2007: 177-180 | |
| c84 | Kofi M. Odame, Christopher M. Twigg, Arindam Basu, Paul E. Hasler: Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform. ISCAS 2007: 445-448 | |
| c83 | Kofi M. Odame, Paul E. Hasler: An Efficient Oscillator Design Based on OTA Nonlinearity. ISCAS 2007: 921-924 | |
| c82 | Arindam Basu, Paul E. Hasler: A Fully Integrated Architecture for Fast Programming of Floating Gates. ISCAS 2007: 957-960 | |
| c81 | Christopher M. Twigg, Paul E. Hasler, I. Faik Baskaya: A Self-Contained Large-Scale FPAA Development Platform. ISCAS 2007: 1187-1191 | |
| c80 | Paul E. Hasler, Arindam Basu, Sctt Kozil: Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems. ISCAS 2007: 1557-1560 | |
| c79 | Arindam Basu, Kofi M. Odame, Paul E. Hasler: Dynamics of a Logarithmic Transimpedance Amplifier. ISCAS 2007: 1673-1676 | |
| c78 | Erhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson: VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. ISCAS 2007: 2168-2171 | |
| c77 | Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch: Optimal Synthesis of MITE Translinear Loops. ISCAS 2007: 2822-2825 | |
| c76 | Arindam Basu, Ryan W. Robucci, Paul E. Hasler: A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current. ISCAS 2007: 3055-3058 | |
| c75 | ||
| c74 | Paul E. Hasler, Scott Koziol, Ethan Farquhar, Arindam Basu: Transistor Channel Dendrites implementing HMM classifiers. ISCAS 2007: 3359-3362 | |
| c73 | Richard B. Wunderlich, Brian P. Degnan, Paul E. Hasler: Capacitively-Biased Floating-Gate CMOS: a New Logic Family. ISCAS 2007: 3728-3731 | |
| c72 | David W. Graham, Paul E. Hasler: Run-Time Programming of Analog Circuits Using Floating-Gate Transistors. ISCAS 2007: 3816-3819 | |
| c71 | Sheng-Yu Peng, Paul E. Hasler, David V. Anderson: An analog programmable multi-dimensional radial basis function based classifier. VLSI-SoC 2007: 13-18 | |
| 2006 | ||
| c70 | H. Dine, S. Chuang, Phillip E. Allen, Paul E. Hasler: A rail to rail, slew-boosted pre-charge buffer. ISCAS 2006 | |
| c69 | ||
| c68 | Christal Gordon, Amanda Preyer, Karolyn Babalola, Robert J. Butera, Paul E. Hasler: An artificial synapse for interfacing to biological neurons. ISCAS 2006 | |
| c67 | Erhan Ozalevli, Paul E. Hasler: A tunable floating gate CMOS resistor for low-power and low-voltage applications. ISCAS 2006 | |
| c66 | Erhan Ozalevli, Muhammad Shakeel Qureshi, Paul E. Hasler: Low-voltage floating-gate CMOS buffer. ISCAS 2006 | |
| c65 | Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, N. A. Hall, F. L. Degertekin: High SNR capacitive sensing transducer. ISCAS 2006 | |
| 2005 | ||
| j3 | Sourabh Ravindran, Paul D. Smith, David W. Graham, Varinthira Duangudom, David V. Anderson, Paul E. Hasler: Towards Low-Power On-chip Auditory Processing. EURASIP J. Adv. Sig. Proc. 2005(7): 1082-1092 (2005) | |
| j2 | Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson: Developing large-scale field-programmable analog arrays for rapid prototyping. IJES 1(3/4): 179-192 (2005) | |
| c64 | Mark Hooper, Matt Kucic, Paul E. Hasler: Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits. ISCAS (1) 2005: 125-128 | |
| c63 | David N. Abramson, Jordan D. Gray, Christopher M. Twigg, Paul E. Hasler: Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. ISCAS (1) 2005: 468-471 | |
| c62 | Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch: Synthesis of MITE log-domain filters with unique operating points. ISCAS (2) 2005: 996-999 | |
| c61 | David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler: A low-power, programmable bandpass filter section for higher-order filter-bank applications. ISCAS (3) 2005: 1980-1983 | |
| c60 | Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler: Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method. ISCAS (3) 2005: 2148-2151 | |
| c59 | Erhan Ozalevli, Paul E. Hasler: Programmable floating-gate CMOS resistors. ISCAS (3) 2005: 2168-2171 | |
| c58 | David W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler: Indirect programming of floating-gate transistors. ISCAS (3) 2005: 2172-2175 | |
| c57 | Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler: Programmable floating-gate techniques for CMOS inverters. ISCAS (3) 2005: 2441-2444 | |
| c56 | Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler: A programmable floating-gate bump circuit with variable width. ISCAS (5) 2005: 4341-4344 | |
| c55 | Venkatesh Srinivasan, Jeff Dugger, Paul E. Hasler: An adaptive analog synapse circuit that implements the least-mean-square learning rule. ISCAS (5) 2005: 4441-4444 | |
| c54 | Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler: A 80µW/frame 104×128 CMOS imager front end for JPEG compression. ISCAS (5) 2005: 5318-5321 | |
| c53 | Erhan Ozalevli, Christopher M. Twigg, Paul E. Hasler: 10-bit programmable voltage-output digital-analog converter. ISCAS (6) 2005: 5553-5556 | |
| c52 | Ravi Chawla, Christopher M. Twigg, Paul E. Hasler: An analog modulator/demodulator using a programmable arbitrary waveform generator. ISCAS (6) 2005: 6106-6109 | |
| c51 | Philomena C. Brady, Paul E. Hasler: Offset compensation in flash ADCs using floating-gate circuits. ISCAS (6) 2005: 6154-6157 | |
| c50 | ||
| c49 | David N. Abramson, Jordan D. Gray, Shyam Subramanian, Paul E. Hasler: A Field-Programmable Analog Array Using Translinear Elements. IWSOC 2005: 425-428 | |
| c48 | ||
| c47 | ||
| 2004 | ||
| c46 | Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson: Developing Large-Scale Field-Programmable Analog Arrays. IPDPS 2004 | |
| c45 | Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch: A fully programmable log-domain bandpass filter using multiple-input translinear elements. ISCAS (1) 2004: 33-36 | |
| c44 | David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler: A programmable bandpass array using floating-gate elements. ISCAS (1) 2004: 97-100 | |
| c43 | Shyam Subramanian, David V. Anderson, Paul E. Hasler: Synthesis of static multiple input multiple output MITE networks. ISCAS (1) 2004: 189-192 | |
| c42 | Angelo W. Pereira, Daniel J. Allen, Paul E. Hasler: A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements. ISCAS (1) 2004: 213-216 | |
| c41 | ||
| c40 | Ethan Farquhar, David N. Abramson, Paul E. Hasler: A reconfigurable bidirectional active 2 dimensional dendrite model. ISCAS (1) 2004: 313-316 | |
| c39 | Christal Gordon, Ethan Farquhar, Paul E. Hasler: A family of floating-gate adapting synapses based upon transistor channel models. ISCAS (1) 2004: 317-20 | |
| c38 | ||
| c37 | Guillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler: Automatic rapid programming of large arrays of floating-gate elements. ISCAS (1) 2004: 373-376 | |
| c36 | Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson: Application performance of elements in a floating-gate FPAA. ISCAS (2) 2004: 589-592 | |
| c35 | Jeff Dugger, Paul E. Hasler: Supervised learning in a two-input analog floating-gate node. ISCAS (5) 2004: 756-759 | |
| c34 | Haw-Jing Lo, Guillermo J. Serrano, Paul E. Hasler, David V. Anderson, Bradley A. Minch: Programmable multiple input translinear elements. ISCAS (1) 2004: 757-760 | |
| c33 | Heejong Yoo, David W. Graham, David V. Anderson, Paul E. Hasler: C4 band-pass delay filter for continuous-time subband adaptive tapped-delay filter. ISCAS (5) 2004: 792-795 | |
| c32 | Ravi Chawla, Guillermo J. Serrano, Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler: Fully differential floating-gate programmable OTAs with novel common-mode feedback. ISCAS (1) 2004: 817-820 | |
| c31 | Mark Hooper, Matt Kucic, Paul E. Hasler: 5V-only, standard 0.5/spl mu/m CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps. ISCAS (5) 2004: 832-835 | |
| c30 | Paul D. Smith, David W. Graham, Ravi Chawla, Paul E. Hasler: A five-transistor bandpass filter element. ISCAS (1) 2004: 861-864 | |
| c29 | Mark Hooper, Matt Kucic, Paul E. Hasler: Characterization of charge-pump rectifiers for standard submicron CMOS processes. ISCAS (5) 2004: 964-967 | |
| c28 | Erhan Ozalevli, Paul E. Hasler, Farhan Adil: Programmable voltage-output, floating-gate digital-analog converter. ISCAS (1) 2004: 1064-1067 | |
| c27 | Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler: A programmable coefficient continuous-time A/D Delta-Sigma modulator. ISCAS (1) 2004: 1148-1151 | |
| 2003 | ||
| j1 | Paul E. Hasler, Abhishek Bandyopadhyay, David V. Anderson: High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits. EURASIP J. Adv. Sig. Proc. 2003(7): 676-689 (2003) | |
| 2002 | ||
| c26 | Tyson S. Hall, Paul E. Hasler, David V. Anderson: Field-Programmable Analog Arrays: A Floating-Gate Approach. FPL 2002: 424-433 | |
| c25 | Paul E. Hasler, David V. Anderson: Cooperative analog-digital signal processing. ICASSP 2002: 3972-3975 | |
| c24 | Heejong Yoo, David V. Anderson, Paul E. Hasler: Continuous-time audio noise suppression and real-time implementation. ICASSP 2002: 3980-3983 | |
| c23 | ||
| c22 | T. M. Massengill, D. M. Wilson, Paul E. Hasler, David W. Graham: Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition. ISCAS (5) 2002: 77-80 | |
| c21 | Julian A. Bragg, Edgar A. Brown, Paul E. Hasler, Stephen P. DeWeerth: A silicon model of an adapting motoneuron. ISCAS (4) 2002: 261-264 | |
| c20 | Joseph D. Neff, Brian K. Meadows, Edgar A. Brown, Stephen P. DeWeerth, Paul E. Hasler: A CMOS coupled nonlinear oscillator array. ISCAS (4) 2002: 301-304 | |
| c19 | Richard A. Blum, Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth: A CMOS imager with real-time frame differencing and centroid computation. ISCAS (3) 2002: 329-332 | |
| c18 | Paul E. Hasler, Abhishek Bandyopadhyay, Paul D. Smith: A matrix transform imager allowing high-fill factor. ISCAS (3) 2002: 337-340 | |
| c17 | Paul D. Smith, Matt Kucic, Paul E. Hasler: Accurate programming of analog floating-gate arrays. ISCAS (5) 2002: 489-492 | |
| c16 | C. Duffy, Ethan Farquhar, Paul E. Hasler: Practical issues using e-pot circuits. ISCAS (5) 2002: 493-496 | |
| c15 | Christal Gordon, Paul E. Hasler: Biological learning modeled in an adaptive floating-gate system. ISCAS (5) 2002: 609-612 | |
| c14 | Paul D. Smith, Matt Kucic, Richard Ellis, Paul E. Hasler, David V. Anderson: Mel-frequency cepstrum encoding in analog floating-gate circuitry. ISCAS (4) 2002: 671-674 | |
| 2001 | ||
| c13 | Matt Kucic, Paul E. Hasler, Jeff Dugger, David V. Anderson: Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits. ARVLSI 2001: 148-162 | |
| 1999 | ||
| c12 | Paul E. Hasler, Bradley A. Minch, Chris Diorio: Adaptive Circuits Using pFET Floating-Gate Devices. ARVLSI 1999: 215-231 | |
| c11 | Bradley A. Minch, Paul E. Hasler, Chris Diorio: Synthesis of multiple-input translinear element networks. ISCAS (2) 1999: 236-239 | |
| c10 | Paul E. Hasler, Jeff Dugger: Correlation learning rule in floating-gate pFET synapses. ISCAS (5) 1999: 387-390 | |
| c9 | Paul E. Hasler, Bradley A. Minch, Chris Diorio: Floating-gate devices: they are not just for digital memories any more. ISCAS (2) 1999: 388-391 | |
| c8 | Bradley A. Minch, Paul E. Hasler: A floating-gate technology for digital CMOS processes. ISCAS (2) 1999: 400-403 | |
| c7 | Paul E. Hasler, Paul D. Smith: An autozeroing floating-gate amplifier with gain adaptation. ISCAS (2) 1999: 412-415 | |
| 1996 | ||
| c6 | W. Fritz Kruger, Paul E. Hasler, Bradley A. Minch, Christof Koch: An Adaptive WTA using Floating Gate Technology. NIPS 1996: 720-726 | |
| 1995 | ||
| c5 | Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead: Single Transistor Learning Synapse with Long Term Storage. ISCAS 1995: 1660-1663 | |
| c4 | Chris Diorio, Sunit Mahajan, Paul E. Hasler, Bradley A. Minch, Carver Mead: A High-Resolution Non-Volatile Analog Memory Cell. ISCAS 1995: 2233-2236 | |
| c3 | Bradley A. Minch, Chris Diorio, Paul E. Hasler, Carver Mead: A vMOS Soft-Maximum Current Mirror. ISCAS 1995: 2249-2252 | |
| 1994 | ||
| c2 | ||
| c1 | Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead: Single Transistor Learning Synapses. NIPS 1994: 817-824 | |
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