Yoshihiro Hayashi

Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno: A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines. J. Solid-State Circuits 47(4): 832-840 (2012)

Koichi Takeda, Toshio Saito, Shinobu Asayama, Yoshiharu Aimoto, Hiroyuki Kobatake, Shinya Ito, Toshifumi Takahashi, Masahiro Nomura, Kiyoshi Takeuchi, Yoshihiro Hayashi: Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs. J. Solid-State Circuits 46(4): 806-814 (2011)

Akira Tanabe, Ken'ichiro Hijioka, Hirokazu Nagase, Yoshihiro Hayashi: A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO. J. Solid-State Circuits 46(4): 883-893 (2011)

Yoshihiro Hayashi, Hiroshi Tsuji, Ryosuke Saga: Visualizing Method based on Item Sales Records and its Experimentation. SMC 2009: 524-528

Ryosuke Saga, Yoshihiro Hayashi, Hiroshi Tsuji: Hotel recommender system based on user's preference transition. SMC 2008: 2437-2442

Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno: Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation. IEICE Transactions 90-C(4): 848-855 (2007)

Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi: A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs. ASP-DAC 1998: 51-56

Masahiro Tomita, Hong-Hai Jiang, Tamotsu Yamamoto, Yoshihiro Hayashi: An Algorithm for Locating Logic Design Errors. ICCAD 1990: 468-471