| 2012 | ||
|---|---|---|
| j2 | Jinjin He, Huaping Liu, Zhongfeng Wang, Xinming Huang, Kai Zhang: High-Speed Low-Power Viterbi Decoder Design for TCM Decoders. IEEE Trans. VLSI Syst. 20(4): 755-759 (2012) | |
| 2010 | ||
| j1 | Jinjin He, Zhongfeng Wang, Huaping Liu: An Efficient 4-D 8PSK TCM Decoder Architecture. IEEE Trans. VLSI Syst. 18(5): 808-817 (2010) | |
| c5 | Jinjin He, Zhongfeng Wang, Huaping Liu: Memory-reduced MAP decoding for double-binary convolutional Turbo code. ISCAS 2010: 469-472 | |
| 2009 | ||
| c4 | Jinjin He, Zhongfeng Wang, Zhiqiang Cui, Li Li: Towards an Optimal Trade-off of Viterbi Decoder Design. ISCAS 2009: 3030-3033 | |
| 2008 | ||
| c3 | Jinjin He, Jian Cui, Lianxing Yang, Zhongfeng Wang: A low-complexity high-performance noncoherent receiver for GFSK signals. ISCAS 2008: 1256-1259 | |
| c2 | Jinjin He, Zhongfeng Wang, Huaping Liu: Low-complexity high-speed 4-D TCM decoder. SiPS 2008: 216-220 | |
| 2007 | ||
| c1 | Lupin Chen, Jinjin He, Zhongfeng Wang: Design of Low-Power Memory-Efficient Viterbi Decoder. SiPS 2007: 132-135 | |
| 1 | Lupin Chen | |
| 2 | Jian Cui | |
| 3 | Zhiqiang Cui | |
| 4 | Xinming Huang | |
| 5 | Li Li | |
| 6 | Huaping Liu | |
| 7 | Zhongfeng Wang | |
| 8 | Lianxing Yang | |
| 9 | Kai Zhang |
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